General Description

The LVQ273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously.

Features

■ Ideal for low power/low noise 3.3V applications

■ Implements patented EMI reduction circuitry

■ Available in SOIC JEDEC, SOIC EIAJ and QSOP packages

■ Guaranteed simultaneous switching noise level and dynamic threshold performance

■ Improved latch-up immunity

■ Guaranteed incident wave switching into 75Ω

■ 4 kV minimum ESD immunity