General Description

These 36-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.

Features

■ 5V tolerant inputs and outputs

■ 2.3V–3.6V VCC specifications provided

■ 6.0 ns tPD max (VCC = 3.3V), 20 µA ICC max

■ Power down high impedance inputs and outputs

■ Supports live insertion/withdrawal (Note 1)

■ ±24 mA output drive (VCC = 3.0V)

■ Uses patented noise/EMI reduction circuitry

■ Latch-up performance exceeds 500 mA

■ ESD performance:

Human body model > 2000V

Machine model > 200V