EEPROM-I²C

The FT24C64A series are 65,536 bits of serial Electrical Erasable and Programmable Read Only Memory, commonly known as EEPROM. They are organized as 8192 words of 8 bits (one byte) each.  The devices are fabricated with proprietary advanced CMOS process for low power and low voltage applications.  T Low voltage and low power operations:\n    FT24C64A: VCC = 1.8V to 5.5V\n32 bytes page write mode.\nPartial page write operation allowed.\nInternally organized: 8,192 × 8 (64K).\nStandard 2-wire bi-directional serial interface.\nSchmitt trigger, filtered inputs for noise protection.\nSelf-timed Writ;

封装/外壳：SC-74A，SOT-753 包装：托盘 描述：IC EEPROM 64KBIT I2C SOT23-5 集成电路（IC） 存储器

封装/外壳：8-WFDFN 裸露焊盘 包装：托盘 描述：IC EEPROM 64KBIT I2C 1MHZ 8DFN 集成电路（IC） 存储器

64/32 Kbit Serial I짼C Bus EEPROM

Description The M24C32, M24C64 and M24128 devices are I2C-compatible electrically erasable programmable memories (EEPROM). They are organized as 4096 × 8 bits, 8192 × 8 bits and 16384 × 8 bits, respectively. I2C uses a two-wire serial interface, comprising a bi-directional data line and a clock

64/32 Kbit Serial I짼C Bus EEPROM

Description The M24C32, M24C64 and M24128 devices are I2C-compatible electrically erasable programmable memories (EEPROM). They are organized as 4096 × 8 bits, 8192 × 8 bits and 16384 × 8 bits, respectively. I2C uses a two-wire serial interface, comprising a bi-directional data line and a clock

64 Kbit 8192 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus

Features • Data EEPROM internally organized as 8192 bytes and 256 pages × 32 bytes • Page Protection Mode for protecting the EEPROM against unintended data changes (SLx 24C64.../P types only) • Low power CMOS • VCC = 2.7 to 5.5 V operation • Two wire serial interface bus, I2C-Bus

64 Kbit 8192 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus

Features • Data EEPROM internally organized as 8192 bytes and 256 pages × 32 bytes • Page Protection Mode for protecting the EEPROM against unintended data changes (SLx 24C64.../P types only) • Low power CMOS • VCC = 2.7 to 5.5 V operation • Two wire serial interface bus, I2C-Bus

64 Kbit 8192 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus

Features • Data EEPROM internally organized as 8192 bytes and 256 pages × 32 bytes • Page Protection Mode for protecting the EEPROM against unintended data changes (SLx 24C64.../P types only) • Low power CMOS • VCC = 2.7 to 5.5 V operation • Two wire serial interface bus, I2C-Bus