2K-Bit SPI??Interface Serial CMOS EEPROM

General Description The FM25C020U is a 2K (2,048) bit serial interface CMOS EEPROM (Electrically Erasable Programmable Read-Only Memory). This device fully conforms to the SPI 4-wire protocol which uses Chip Select (/CS), Clock (SCK), Data-in (SI) and Dataout (SO) pins to synchronously control da

2K-Bit SPI™ Interface Serial CMOS EEPROM

2K-Bit SPI??Interface Serial CMOS EEPROM

General Description The FM25C020U is a 2K (2,048) bit serial interface CMOS EEPROM (Electrically Erasable Programmable Read-Only Memory). This device fully conforms to the SPI 4-wire protocol which uses Chip Select (/CS), Clock (SCK), Data-in (SI) and Dataout (SO) pins to synchronously control da

2K-Bit SPI??Interface Serial CMOS EEPROM

General Description The FM25C020U is a 2K (2,048) bit serial interface CMOS EEPROM (Electrically Erasable Programmable Read-Only Memory). This device fully conforms to the SPI 4-wire protocol which uses Chip Select (/CS), Clock (SCK), Data-in (SI) and Dataout (SO) pins to synchronously control da

2K-Bit SPI??Interface Serial CMOS EEPROM

General Description The FM25C020U is a 2K (2,048) bit serial interface CMOS EEPROM (Electrically Erasable Programmable Read-Only Memory). This device fully conforms to the SPI 4-wire protocol which uses Chip Select (/CS), Clock (SCK), Data-in (SI) and Dataout (SO) pins to synchronously control da

2K-Bit Serial CMOS EEPROM (Serial Peripheral Interface (SPI) Synchronous Bus)

General Description The NM25C020 is a 2048-bit CMOS EEPROM with an SPI compatible serial interface. The NM25C020 is designed for data storage in applications requiring both non-volatile memory and insystem data updates. This EEPROM is well suited for applications using the 68HC11 series of microc

2Mb EEPROM with 25MHz SPI Bus Interface

[SAIFUN] General Description The SA25C020 is a 2Mb (512K X 4) CMOS non-volatile serial EEPROM. This device fully conforms to the SPI 4-wire protocol, is enabled through the Chip Select (CSb) pin, and uses Clock (SCK), Data-in (SI) and Data-out (SO) pins to synchronously control data transfer bet