Dual N-Channel Logic Level PowerTrench MOSFET

General Description These N-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor’s advanced PowerTrench® process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage

双 N 沟道，PowerTrench® MOSFET，逻辑电平，40V，6A，29mΩ

这些N沟道逻辑电平MOSFET采用飞兆半导体先进的Power Trench®工艺生产，这一先进工艺是专为最大限度地降低导通电阻并保持卓越开关性能而定制的。 这些器件非常适合需要线路内低功率损耗和快速开关的低电压和电池供电应用。 •最大RDS(on) = 29mΩ @ VGS = 10V\n•最大RDS(on) = 36mΩ @ VGS = 4.5V\n•低栅极电荷\n•高性能沟道技术可实现极低的RDS(on)\n•高功率和高电流处理能力\n•符合RoHS标准;

Dual N-Channel Logic Level PowerTrench짰 MOSFET

文件：544.78 Kbytes Page：6 Pages

Dual N-Channel Logic Level PowerTrench MOSFET

General Description These N-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor’s advanced PowerTrench® process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage

双 N 沟道，逻辑电平，PowerTrench® MOSFET，40V，6A，29mΩ

这些N沟道逻辑电平MOSFET采用飞兆半导体先进的PowerTrench®工艺生产，这一先进工艺是专为最大限度地降低通态电阻并保持卓越开关性能而定制的。这些器件非常适合需要线路内低功率损耗和快速开关的低电压和电池供电应用。 •最大 rDS(ON) = 29 mΩ (VGS = 10 V)\n•最大rDS(ON) = 36mΩ @VGS = 4.5V\n•低栅极电荷\n•高性能沟道技术可实现极低的 rDS(ON)\n•高功率和高电流处理能力\n•符合 AEC Q101 标准\n•符合 RoHS 标准;

Dual N-Channel Logic Level PowerTrench짰 MOSFET

文件：544.78 Kbytes Page：6 Pages

Dual N-Channel 60 V (D-S) 175 째C MOSFET

文件：1.09101 Mbytes Page：9 Pages

PNP / NPN Epitaxial Planar Silicon Transistors Push-Pull Circuit Applications

PNP / NPN Epitaxial Planar Silicon Transistors Features • Composite type with a PNP transistor and an NPN transistor contained in one package facilitating high-density mounting. • Ultrasmall package permitting applied sets to be small and slim. Applications • MOSFET gate drivers, relay driver

8940 THRU 8925 8955 THRU 8961

文件：56.04 Kbytes Page：1 Pages

Alignment Kit for AEAT-9000 Encoders

文件：2.29565 Mbytes Page：15 Pages