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60-SOM中文资料

厂家型号

60-SOM

文件大小

2400.66Kbytes

页面数量

42

功能描述

60 Series SOM

数据手册

下载地址一下载地址二到原厂下载

生产厂商

EZURIO

60-SOM数据手册规格书PDF详情

General Description

The Ezurio 60 Series SOM (part number 453-00003 and 453-00004) wireless bridge module is a wireless communications subsystem that may be integrated into a variety of host devices via many available electronic and logical interfaces. The SOM provides complete enterprise-class Wi-Fi connectivity with an integrated TCP/IP stack. It also provides full support for 2x2 MIMO 802.11 a/b/g/n/ac WLAN plus Bluetooth 5.1 dual mode dual-mode air standards with a fully integrated security supplicant providing WPA/WPA2/WPA3 authentication, data encryption, and BT protocol stacks.

The 60-SOM has a wide variety of interfaces including RMII, RGMII, serial UART, Hi-Speed USB, SPI, SDIO, TTL RGB, PCM, and I2C. The wireless bridge may be configured, monitored, and managed via a Command Line Interface (CLI) over an available dedicated console port, via a web interface over a wireless or Ethernet interface, or via a remote SDK interface over wireless or Ethernet.

The 60-SOM incorporates the Ezurio 60-SIPT Wi-Fi SiP module which uses Marvell 88W8997/88PG823. The product also features the ARM® Cortex®-A5 processor running at 536 MHz and an MCP memory with 1 Gb or 2 Gb 32-bit LPDDR1 or LPDDR2 memory, and 2 Gb or 4 Gb 8-bit SLC NAND flash storage. Several GPIO lines are available for data acquisition and similar applications. A software developer’s kit (SDK) with Application Programming Interfaces (API) and software tools are available for the development of custom software applications on the device.

Features and Functionality

The 60-SOM has several interfaces, some of which are multiplexed and not available simultaneously. The module has the following features:

•Atmel single ARM Cortex-A5 core operating at speeds up to 536 MHz:

– 32-Kb L1 instruction cache

– 32-Kbyte data cache, 32-Kbyte instruction cache, Virtual Memory System Architecture (VMSA)

– 160-Kbyte internal ROM single-cycle access at system speed.

– One 128-Kbyte internal SRAM, single-cycle access at system speed

– Very slow clock operating mode, software programmable power optimization capabilities

•Security:

– TRNG: True random number generator

– AES: 256-bit, 192-bit, 128-bit key algorithm, compliant with FIPS PUB 197 Specifications

– TDES: Two-key or three-key algorithms, compliant with FIPS PUB 46-3 Specifications

– Atmel/Microchip secure boot solution

•Memory, option 1:

– 1 Gb, 32-bits of Lower Power DDR (LPDDR) memory

– 2 Gb, 8-bits of SLC NAND flash memory

•Memory, option 2:

– 2 Gb, 32-bits of Lower Power DDR (LPDDR) memory

– 4 Gb, 8-bits of SLC NAND flash memory

•Memory, option 3:

– 1 Gb, 32-bits of Lower Power DDR2 (LPDDR2) memory

– 2 Gb, 8-bits of SLC NAND flash memory

•Memory, option 4:

– 2 Gb, 32-bits of Lower Power DDR2 (LPDDR2) memory

– 4 Gb, 8-bits of SLC NAND flash memory

•2X2 IEEE 802.11 a/b/g/n/ac WLAN interface

•Bluetooth version 5.1 dual-mode

•Support interface:

– 24-bits TTL RGB bus for TFT LCD display

– X1 MMC/SD/SDIO port

– X3 HS/FS/LS USB Ports with: X1 USB device port. X2 USB host ports.

– X1 10/100/1000 Mbps reduced Gigabit media independent interface (RGMII)

– X1 10/100 Mbps reduced media-independent interface (RMII)

– X1 CAN bus, fully compliant with CAN 2.0 Part A and 2.0 Part B

– X3 UARTs

– X1 DBGU for debug purpose

– X2 Master/Slave serial peripheral interfaces

– X1 Synchronous serial controllers

– X2 Two-wire interface up to 400 Kbit/s supporting I2C Protocol and SMBUS

– ADC and GPIOs

•Ultra-miniature low profile SMT module (30 x 30 x 2.8 mm) based on 188 pads 2 row LGA package.

The 60-SOM provides the following two U. FL type antenna connectors that provide two streams MIMO operation to reach the maximum data rate:

•Main/ANT0 antenna – Wi-Fi only

•Auxiliary/ANT1 – Wi-Fi and Bluetooth

更新时间:2021-9-14 10:50:00
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