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EPM7192价格
参考价格：￥587.1554
型号：EPM7192SQC160-10 品牌：Altera 备注：这里有EPM7192多少钱，2026年最近7天走势，今日出价，今日竞价，EPM7192批发/采购报价，EPM7192行情走势销售排行榜，EPM7192报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 |   | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family Features ■ High-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX® architecture ■ 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices – ISP circuitry compa | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
High-performance, EEPROM-based programmable logic devices PLDs) based on second-generation MAX architecture General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family Features ■ High-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX® architecture ■ 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices – ISP circuitry compa | ALTERA 阿尔特 | | ||
High-performance, EEPROM-based programmable logic devices PLDs) based on second-generation MAX architecture General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family 文件：1.49779 Mbytes Page：66 Pages | ALTERA 阿尔特 | | ||
Package Information Datasheet for Mature Altera Devices 文件：2.063429 Mbytes Page：182 Pages | ALTERA 阿尔特 | | ||
可编程逻辑器件(CPLD/FPGA) | INTEL 英特尔 | | ||
High-performance, EEPROM-based programmable logic devices PLDs) based on second-generation MAX architecture | INTEL 英特尔 | | ||
Programmable Logic Device Family 文件：1.49779 Mbytes Page：66 Pages | ALTERA 阿尔特 | | ||
封装/外壳：160-BQFP 包装：托盘 描述：IC CPLD 192MC 10NS 160QFP 集成电路（IC） CPLD（复杂可编程逻辑器件） | INTEL 英特尔 | | ||
封装/外壳：160-BQFP 包装：托盘 描述：IC CPLD 192MC 10NS 160QFP 集成电路（IC） CPLD（复杂可编程逻辑器件） | INTEL 英特尔 | | ||
Fully Integrated, Hall-Effect Based Linear Current Sensor IC with 3 kVRMS Isolation and a Low-Resistance Current Conductor Description The Broadcom® ACHS-719x (±10A to ±50A) fully integrated Hall-effect based isolated linear current sensors are designed for AC or DC current sensing in industrial, commercial, and communications systems. Inside each ACHS-719x IC is a precise, low-offset, linear Hall circuit with a | BOARDCOM 博通 | | ||
Male Pins 文件：160.09 Kbytes Page：1 Pages | HEYCO | | ||
ADSL Filter Inductors 文件：133.98 Kbytes Page：1 Pages | FILTRAN 费尔兰特 | | ||
Emergency Transponders 文件：84.18 Kbytes Page：2 Pages | SONARDYNE | | ||
Filter Inductors 文件：412.69 Kbytes Page：1 Pages | APITECH | |
EPM7192产品属性
- 类型
描述
- 型号
EPM7192
- 制造商
ALTERA
- 制造商全称
Altera Corporation
- 功能描述
Programmable Logic Device Family
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
ALTERA |
25+ |
QFP-160 |
4500 |
全新原装、诚信经营、公司现货销售 |
|||
ALTERA |
23+ |
14+ |
38782 |
##公司主营品牌长期供应100%原装现货可含税提供技术 |
|||
ALTERA |
1420+ |
QFP160 |
6700 |
公司主营ALTERA系列,全新原装,正品供应 |
|||
ALTERA |
59 |
原装正品 |
|||||
ALTERA |
25+ |
QFP |
300 |
优势渠道、优势价格 |
|||
ALTERA |
24+ |
QFP |
6980 |
原装现货,可开13%税票 |
|||
ALTERA/INTEL |
2021 |
BGA |
1000 |
全新、原装 |
|||
ALTERA |
18+ |
QFP |
85600 |
保证进口原装可开17%增值税发票 |
|||
ALTERA |
02+ |
QFP |
3300 |
全新原装进口自己库存优势 |
|||
ALTERA |
23+ |
QFP |
20000 |
全新原装假一赔十 |
EPM7192芯片相关品牌
EPM7192规格书下载地址
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EPM7192数据表相关新闻
EPM7192SQI160-10N原装现货价好
EPM7192SQI160-10N 80000PCS
2025-4-30EPM7160SQC160-10
EPM7160SQC160-10
2023-5-4EPM7192SQC160-15N
IC CPLD 192MC 15NS 160QFP
2022-10-19EPM7160LC84-1，EPM7160LC84-2，EPM7160LC84-3
EPM7160LC84-1，EPM7160LC84-2，EPM7160LC84-3
2020-4-7EPM7160SLI84-10CPLD-复杂可编程逻辑器
EPM7160SLI84-10 CPLD - 复杂可编程逻辑器
2019-4-15EPM7256AEQC208-7公司全新原装/长期供应
EPM7256AEQC208-7公司全新原装/长期供应
2019-4-9
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