EPM7192价格
参考价格：￥587.1554
型号：EPM7192SQC160-10 品牌：Altera 备注：这里有EPM7192多少钱，2026年最近7天走势，今日出价，今日竞价，EPM7192批发/采购报价，EPM7192行情走势销售排行榜，EPM7192报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 |   | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family Features ■ High-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX® architecture ■ 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices – ISP circuitry compa | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
High-performance, EEPROM-based programmable logic devices PLDs) based on second-generation MAX architecture General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family Features ■ High-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX® architecture ■ 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices – ISP circuitry compa | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
High-performance, EEPROM-based programmable logic devices PLDs) based on second-generation MAX architecture General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family 文件：1.49779 Mbytes Page：66 Pages | ALTERA 阿尔特 | | ||
Package Information Datasheet for Mature Altera Devices 文件：2.063429 Mbytes Page：182 Pages | ALTERA 阿尔特 | | ||
可编程逻辑器件(CPLD/FPGA) | INTEL 英特尔 | | ||
High-performance, EEPROM-based programmable logic devices PLDs) based on second-generation MAX architecture | INTEL 英特尔 | | ||
Programmable Logic Device Family 文件：1.49779 Mbytes Page：66 Pages | ALTERA 阿尔特 | | ||
封装/外壳：160-BQFP 包装：托盘 描述：IC CPLD 192MC 10NS 160QFP 集成电路（IC） CPLD（复杂可编程逻辑器件） | INTEL 英特尔 | | ||
封装/外壳：160-BQFP 包装：托盘 描述：IC CPLD 192MC 10NS 160QFP 集成电路（IC） CPLD（复杂可编程逻辑器件） | INTEL 英特尔 | | ||
Video Encoder with Six 10-Bit DACs, 54 MHz Oversampling and Progressive Scan Inputs GENERAL DESCRIPTION The ADV7192 is part of the new generation of video encoders from Analog Devices. The device builds on the performance of previous video encoders and provides new features like interfacing progressive scan devices, Digital Noise Reduction, Gamma Correction, 4× Oversampling and | AD 亚德诺 | | ||
ADSL Filter Inductors 文件：133.98 Kbytes Page：1 Pages | FILTRAN 费尔兰特 | | ||
Emergency Transponders 文件：84.18 Kbytes Page：2 Pages | SONARDYNE | |
EPM7192产品属性
- 类型
描述
- 逻辑门数量：
3750
- 工作电压范围 - VCCIO：
4.75V~5.25V
- 逻辑阵列块数：
12
- 最大引脚延迟：
20ns
- 工作温度范围：
0℃~+70℃
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
ALTERA |
23+ |
PQFP |
150 |
||||
ECE |
23+ |
NA |
546 |
专做原装正品,假一罚百! |
|||
ALTERA(阿尔特拉) |
25+ |
N/A |
7786 |
原装正品现货,原厂订货,可支持含税原型号开票。 |
|||
ALTERA/阿尔特拉 |
2025+ |
QFP160 |
5000 |
原装进口价格优 请找坤融电子! |
|||
ALTERA |
2025+ |
N/A |
70000 |
柒号只做原装 现货价秒杀全网 |
|||
23+ |
DIP |
10000 |
原厂授权一级代理,专业海外优势订货,价格优势、品种 |
||||
26+ |
N/A |
82000 |
一级代理-主营优势-实惠价格-不悔选择 |
||||
原装 |
最新 |
6900 |
只做进口原装品质决定一切价格优惠 |
||||
ALTERA |
23+ |
QFP |
8000 |
只做原装现货 |
|||
DIPTRONICS |
2447 |
SMD |
100500 |
一级代理专营品牌!原装正品,优势现货,长期排单到货 |
EPM7192规格书下载地址
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EPM7192数据表相关新闻
EPM7192SQI160-10N原装现货价好
EPM7192SQI160-10N 80000PCS
2025-4-30EPM7160SQC160-10
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EPM7256AEQC208-7公司全新原装/长期供应
2019-4-9
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