Programmable Logic Device Family

Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP,pin-to-pin delays as fast as 5 ns, and counter speeds

Programmable Logic Device Family

General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte

Programmable Logic Device Family

General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte

EPM7064SLC44-7N - 芯片, CPLD, MAX 7000, 64宏单元, PLCC44

The EPM7064SLC44-7N is an EEPROM Complex Programmable Logic Device with 1250 usable gates and 64 macro cells. MAX 3000A CPLD is a high-density, high-performance and fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5000 usable gates, ISP, pin-to-pin delays as ·PCI-compliant device\n·Open-drain output\n·Programmable security bit for protection of proprietary designs;

封装/外壳：44-LCC（J 形引线） 包装：托盘 描述：IC CPLD 64MC 10NS 44PLCC 集成电路（IC） CPLD（复杂可编程逻辑器件）

CPLD/FPGA芯片

封装/外壳：44-LCC（J 形引线） 包装：托盘 描述：IC CPLD 64MC 10NS 44PLCC 集成电路（IC） CPLD（复杂可编程逻辑器件）

Programmable Logic Device Family

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