P?륝hannel Logic Level Enhancement Mode Field Effect Transistor

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Power MOSFETs-P Channel

P-Channel Enhancement Mode Field Effect Transistor

FEATURES ■ -30V, -47A, RDS(ON) =20mΩ @VGS = -10V. RDS(ON) =32mΩ @VGS = -4.5V. ■ Super high dense cell design for extremely low RDS(ON). ■ High power and current handing capability. ■ Lead free product is acquired. ■ TO-220 & TO-263 package.

P-Channel Enhancement Mode Field Effect Transistor

FEATURES ■ -30V, -47A, RDS(ON) =20mΩ @VGS = -10V. RDS(ON) =32mΩ @VGS = -4.5V. ■ Super high dense cell design for extremely low RDS(ON). ■ High power and current handing capability. ■ Lead free product is acquired. ■ TO-220 & TO-263 package.

TMOS POWER FET LOGIC LEVEL 50 AMPERES 30 VOLTS

HDTMOS E-FET™ High Energy Power FET D2PAK for Surface Mount P-channel Enhancement-Mode Silicon Gate The D2PAK package has the capability of housing a larger die than any existing surface mount package which allows it to be used in applications that require the use of surface mount componen

TMOS POWER FET LOGIC LEVEL 50 AMPERES 30 VOLTS RDS(on) = 0.025 OHM

HDTMOS E-FET Power Field Effect Transistor P–Channel Enhancement–Mode Silicon Gate This advanced high–cell density HDTMOS power FET is designed to withstand high energy in the avalanche and commutation modes. The new energy efficient design also offers a drain–to–source diode with a fast recover

OptiMOS-P Power - Transistor

Feature • P-Channel • Enhancement mode • Logic Level • High current rating • 175°C operating temperature • Avalanche rated • dv/dt rated