Analog Front End Integrated Circuit for 13.56Mhz RFID Base Station

General Description The EM4094 is an integrated analog system for 13.56MHz RFID reader system. It is highly versatile so it can be used in different reader systems having sub-carrier frequencies from 212KHz to 848KHz, hence covering ISO 14443 and ISO 15693 standards. The adaptability is achieved

13.56MHz, compliant ISO 15693 and ISO 14443A&B, Analog Front End IC for RFID Base Station

The EM4094 is an integrated analog system for 13.56MHz RFID reader system. It is highly versatile so it can be used in different reader systems having sub-carrier frequencies from 212KHz to 848KHz, hence covering ISO 14443 and ISO 15693 standards.The adaptability is achieved using a 3 wires serial i ·ISO15693 and ISO14443 compatibility\n·Oscillator using 13.56MHz Quartz with selectable transconductance.\n·Antenna driver using OOK or ASK modulation using single antenna driver\n·ASK modulation adjustable in range from 7% to 30%\n·High output power 200mW from 5V supply\n·Antenna short circ;

封装/外壳：16-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR） 描述：13.56MHZ, COMPLIANT ISO 15693 AN RF/IF，射频/中频和 RFID RFID，射频接入，监控 IC

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR） 描述：13.56MHZ, COMPLIANT ISO 15693 AN RF/IF，射频/中频和 RFID RFID，射频接入，监控 IC

8-stage shift-and-store bus register

DESCRIPTION The HEF4094B is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs O0 to O7. The parallel outputs may be connected directly to common bus lines.

8-stage shift-and-store bus register

DESCRIPTION The HEF4094B is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs O0 to O7. The parallel outputs may be connected directly to common bus lines.

8-stage shift-and-store bus register

DESCRIPTION The HEF4094B is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs O0 to O7. The parallel outputs may be connected directly to common bus lines.

J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER

J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER Dual operational amplifier µPC4094 is a high-speed version of the µPC4092. NECs unique high-speed PNP transistor (fT = 300 MHz) in the output stage realizes a high slew rate of 25 V/µs under voltage-follower conditions without an oscillation probl

J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER

J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER Dual operational amplifier µPC4094 is a high-speed version of the µPC4092. NECs unique high-speed PNP transistor (fT = 300 MHz) in the output stage realizes a high slew rate of 25 V/µs under voltage-follower conditions without an oscillation probl