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型号 功能描述 生产厂家 企业 LOGO 操作

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (

WEDC

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (

WEDC

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (

WEDC

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (

WEDC

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (

WEDC

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (

WEDC

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (

WEDC

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

EDI88128LP产品属性

  • 类型

    描述

  • 型号

    EDI88128LP

  • 功能描述

    128K X 8 STATIC RAM CMOS MONOLITHIC

更新时间:2026-8-3 23:01:00
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