512M bits DDR-II SDRAM

Description The EDE5104GB is a 512M bits DDR-II SDRAM organized as 33,554,432 words × 4 bits × 4 banks. The EDE5108GB is a 512M bits DDR-II SDRAM organized as 16,777,216 words × 8 bits × 4 banks. It packaged in 64-ball µBGA® package. Features • 1.8V power supply • Double-data-rate architectur

512M bits DDR-II SDRAM

Description The EDE5104GB is a 512M bits DDR-II SDRAM organized as 33,554,432 words × 4 bits × 4 banks. The EDE5108GB is a 512M bits DDR-II SDRAM organized as 16,777,216 words × 8 bits × 4 banks. It packaged in 64-ball µBGA® package. Features • 1.8V power supply • Double-data-rate architectur

512M bits DDR-II SDRAM

Description The EDE5104GB is a 512M bits DDR-II SDRAM organized as 33,554,432 words × 4 bits × 4 banks. The EDE5108GB is a 512M bits DDR-II SDRAM organized as 16,777,216 words × 8 bits × 4 banks. It packaged in 64-ball µBGA® package. Features • 1.8V power supply • Double-data-rate architectur

Low Profile PCI 1-Port RS-232, RS-422, RS-485, RS-530, RS-530A, V.35

Features • Compliant with RoHS and WEEE directives • Configurable for RS-232, RS-422, RS-485, RS-530, RS-530A, or V.35 • Z16C32 Integrated Universal Serial Controller (IUSC) with built-in DMA controller and 32-byte FIFO buffer • 256K bytes of onboard RAM/link list DMA supported • Data rates

Low Profile PCI Express 1-Port RS-232, RS-422, RS-485, RS-530, RS-530A, V.35 Synchronous Serial

Features • Compliant with RoHS and WEEE directives • Configurable for RS-232, RS-422, RS-485, RS-530, RS-530A, or V.35 • Z16C32 Integrated Universal Serial Controller (IUSC) with built-in DMA controller and 32-byte FIFO buffer • 256K bytes of onboard RAM/link list DMA supported • Data rates

22 (7/30) AWG Tinned Copper

文件：411.58 Kbytes Page：4 Pages

Industrial five-band GSM/GPRS/EDGE/UMTS/HSPA cellular routers

文件：670.21 Kbytes Page：4 Pages

300mA Alkaline Boost DC/DC Converters in SOT-23-5

文件：336.62 Kbytes Page：7 Pages