FPGA和CPLD

重新定义了FPGA的应用领域——拥有高达95K LUT、5.3Mbit的sysMEM™ 存储器块以及分布式RAM，ECP2和ECP2M产品系列集成原先只有高成本FPGA才具有的功能。\n带有PCS的高速SERDES——可对具备高抖动容差、带有PCS块的低速传输SERDES进行配置，以支持各类普遍使用的数据协议，包括PCI Express、以太网（1GbE和SGMII）、OBSAI和CPRI。\n低功耗、高性能——静态功耗仅为0.35W，并且LatticeECP2/M产品系列还能支持速率高达840Mbps的LVDS IO、速率为533Mbps的DDR1/2以及速率为750Mbps的SPI4.2。 ●嵌入式SERDES支持高达3.125 Gbps数据速率（仅LatticeECP2M支持）\n●多达42个sysDSP™块，提供高性能乘法和累加运算\n●55 Kbit至5308 Kbit的sysMEM™嵌入式RAM块（EBR）\n●sysCLOCK提供模拟PLL和DLL，实现时钟倍频、分频、相移和延迟调整\n●可选TQFP、PQFP和fpBGA封装;

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