位置：首页 > IC中文资料第11483页 > EBE10A
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
EBE10A | EURO BLOCKS TS & EB SERIES 文件：159.33 Kbytes Page：1 Pages | ADAM-TECH 亚当科技 |   | |
1GB Registered DDR2 SDRAM DIMM Features • Double-data-rate architecture; two data transfers per clock cycle • The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture • Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver • | ELPIDA 尔必达 | | ||
1GB Registered DDR2 SDRAM DIMM Features • Double-data-rate architecture; two data transfers per clock cycle • The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture • Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver • | ELPIDA 尔必达 | | ||
1GB Registered DDR2 SDRAM DIMM Features • Double-data-rate architecture; two data transfers per clock cycle • The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture • Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver • | ELPIDA 尔必达 | | ||
1GB Registered DDR2 SDRAM DIMM Features • Double-data-rate architecture; two data transfers per clock cycle • The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture • Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver • | ELPIDA 尔必达 | | ||
1GB Registered DDR2 SDRAM DIMM Features • Double-data-rate architecture; two data transfers per clock cycle • The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture • Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver • | ELPIDA 尔必达 | | ||
1GB Registered DDR2 SDRAM DIMM Features • Double-data-rate architecture; two data transfers per clock cycle • The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture • Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver • | ELPIDA 尔必达 | | ||
1GB Registered DDR2 SDRAM DIMM Features • Double-data-rate architecture; two data transfers per clock cycle • The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture • Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver • | ELPIDA 尔必达 | | ||
1GB Registered DDR2 SDRAM DIMM Features • Double-data-rate architecture; two data transfers per clock cycle • The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture • Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver • | ELPIDA 尔必达 | | ||
1GB Registered DDR2 SDRAM DIMM Features • Double-data-rate architecture; two data transfers per clock cycle • The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture • Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver • | ELPIDA 尔必达 | | ||
1GB Registered DDR2 SDRAM DIMM | MICRON 美光 | | ||
1GB Registered DDR2 SDRAM DIMM | MICRON 美光 | | ||
1GB Registered DDR2 SDRAM DIMM | MICRON 美光 | |
EBE10A产品属性
- 类型
描述
- 型号
EBE10A
- 制造商
ADAM-TECH
- 制造商全称
Adam Technologies, Inc.
- 功能描述
EURO BLOCKS TS & EB SERIES
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
ELP |
25+ |
NA |
265 |
专做原装正品,假一罚百! |
EBE10A规格书下载地址
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DdatasheetPDF页码索引
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