DPDT(VDD/VC)

Integrated Circuit 8-Digit/Segment Fluorescent Display Driver

Description: The NTE2021 and NTE2022 consist of eight NPN Darlington output stages and the associated common–emitter input stages in an 18–Lead DIP type package. These devices are designed to interface between low–level digital logic and vacuum fluorescent displays. They are capable of driving

CK00 100/133 MHz spread spectrum differential system clock generator

DESCRIPTION The PCK2022R is a clock synthesizer/driver for a Pentium III™ and other similar processors The PCK2022R has eight differential pair CPU current source outputs, one 33/66 MHz output which is configurable on power-up, two 48 MHz clocks which can be disabled on power-up, and one 3.3 V r

CK00 100/133 MHz spread spectrum differential system clock generator

DESCRIPTION The PCK2022R is a clock synthesizer/driver for a Pentium III™ and other similar processors The PCK2022R has eight differential pair CPU current source outputs, one 33/66 MHz output which is configurable on power-up, two 48 MHz clocks which can be disabled on power-up, and one 3.3 V r

Tape formatting and error correction for the DCC system

GENERAL DESCRIPTION Performing the tape formatting and error correction functions for DCC applications, the SAA2022 can be used in conjunction with the PASC (SAA2002/SAA2012), tape equalization (SAA2032), read amplifier (TDA1317 or TDA1318) and write amplifier (TDA1316 or TDA1319) circuits to imp

Tape formatting and error correction for the DCC system

GENERAL DESCRIPTION Performing the tape formatting and error correction functions for DCC applications, the SAA2022 can be used in conjunction with the PASC (SAA2002/SAA2012), tape equalization (SAA2032), read amplifier (TDA1317 or TDA1318) and write amplifier (TDA1316 or TDA1319) circuits to imp