The MA31755 is a 16 bit Error Detection and Correction Unit intended for use in high integrity systems for monitoring and correcting data values retrieved from memory. The EDAC is placed in the data bus between the processor and the memory to be protected. Extra check bits added at each memory location are programmed transparently by the EDAC during a processor write cycle. The entire checkword and data combination is verified on read cycles. If any one bit in the incoming data stream is at fault the EDAC can correct the fault transparently, presenting the corrected 16-bit value to the processor. An error in two bits can be detected but cannot be corrected. Both the correctable and uncorrectable error conditions are signalled to the system to allow the processor to take action as required. Parity is passed through the device unchanged as data bus bit 16.

Tri-statable bus transceivers with a high drive capability are incorporated at the MD and CB busses which allows the usual bus driver devices to be removed and reduces the overall timing overhead imposed on the data bus. Although designed primarily for MA31750 application, this part may be used in almost any 16-bit processor system requiring high data integrity.

FEATURES

■ Fast Feedthrough (35ns Detect and Correct Cycle)

■ 16-Bit Operation with 6 Check Bits

■ Radiation Hard CMOS/SOS Technology

■ Feedthrough Operation

■ Error Corrected/Uncorrected Flags

■ High Drive Capability on Memory Busses