5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DCBalanced) Converter

1FEATURES 2• 5 MHz–43 MHz Embedded Clock & DCBalanced Data Transmission (21 Total LVDS Data Bits Plus 3 Low Speed LVCMOS Data Bits) • User Adjustable Pre-Emphasis Driving Ability Through External Resistor on LVDS Outputs and Capable to Drive up to 10 Meters Shielded Twisted-Pair Cable • S

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DC DCBalanced)

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to Single Embedded Clock DC-Balanced LVDS Converter

文件：1.01342 Mbytes Page：18 Pages

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to Single Embedded Clock DC-Balanced LVDS Converter

文件：1.01592 Mbytes Page：18 Pages

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DC Balanced) Converter

文件：867.7 Kbytes Page：26 Pages

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DC DCBalanced)

文件：865.03 Kbytes Page：27 Pages

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DCBalanced) Converter

1FEATURES 2• 5 MHz–43 MHz Embedded Clock & DCBalanced Data Transmission (21 Total LVDS Data Bits Plus 3 Low Speed LVCMOS Data Bits) • User Adjustable Pre-Emphasis Driving Ability Through External Resistor on LVDS Outputs and Capable to Drive up to 10 Meters Shielded Twisted-Pair Cable • S

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DCBalanced) Converter

1FEATURES 2• 5 MHz–43 MHz Embedded Clock & DCBalanced Data Transmission (21 Total LVDS Data Bits Plus 3 Low Speed LVCMOS Data Bits) • User Adjustable Pre-Emphasis Driving Ability Through External Resistor on LVDS Outputs and Capable to Drive up to 10 Meters Shielded Twisted-Pair Cable • S

5-43MHz FPD 链接 LVDS（3 数据 + 1 时钟）至 FPD-Link II LVDS（嵌入式时钟直流平衡)转换器

The DS99R421 converts a FPD-Link input with 4 non-DC Balanced LVDS (3 LVDS Data + LVDS Clock) plus 3 over-sampled low speed control bits into a single LVDS DC-balanced serial stream with embedded clock information. This single serial stream simplifies transferring the 24-bit bus over a single differ • 5 MHz–43 MHz Embedded Clock & DC-Balanced Data Transmission (21 Total LVDS Data Bits Plus 3 Low Speed LVCMOS Data Bits)\n• User Adjustable Pre-Emphasis Driving Ability Through External Resistor on LVDS Outputs and Capable to Drive up to 10 Meters Shielded Twisted-Pair Cable\n• Supports AC-Coupling;

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DCBalanced) Converter

1FEATURES 2• 5 MHz–43 MHz Embedded Clock & DCBalanced Data Transmission (21 Total LVDS Data Bits Plus 3 Low Speed LVCMOS Data Bits) • User Adjustable Pre-Emphasis Driving Ability Through External Resistor on LVDS Outputs and Capable to Drive up to 10 Meters Shielded Twisted-Pair Cable • S

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DCBalanced) Converter

1FEATURES 2• 5 MHz–43 MHz Embedded Clock & DCBalanced Data Transmission (21 Total LVDS Data Bits Plus 3 Low Speed LVCMOS Data Bits) • User Adjustable Pre-Emphasis Driving Ability Through External Resistor on LVDS Outputs and Capable to Drive up to 10 Meters Shielded Twisted-Pair Cable • S

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DCBalanced) Converter

1FEATURES 2• 5 MHz–43 MHz Embedded Clock & DCBalanced Data Transmission (21 Total LVDS Data Bits Plus 3 Low Speed LVCMOS Data Bits) • User Adjustable Pre-Emphasis Driving Ability Through External Resistor on LVDS Outputs and Capable to Drive up to 10 Meters Shielded Twisted-Pair Cable • S

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to Single Embedded Clock DC-Balanced LVDS Converter

文件：1.01592 Mbytes Page：18 Pages

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DC DCBalanced)

文件：865.03 Kbytes Page：27 Pages

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DC Balanced) Converter

文件：867.7 Kbytes Page：26 Pages

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to Single Embedded Clock DC-Balanced LVDS Converter

文件：1.01592 Mbytes Page：18 Pages

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DC Balanced) Converter

文件：867.7 Kbytes Page：26 Pages

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DC Balanced) Converter

文件：867.7 Kbytes Page：26 Pages

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to Single Embedded Clock DC-Balanced LVDS Converter

文件：1.01592 Mbytes Page：18 Pages

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DC Balanced) Converter

文件：867.7 Kbytes Page：26 Pages

封装/外壳：36-WFQFN 裸露焊盘 功能：串行器 包装：卷带（TR） 描述：IC LVDS/FPD 5-43MHZ LINK 36WQFN 集成电路（IC） 串行器，解串器

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DC Balanced) Converter

文件：867.7 Kbytes Page：26 Pages

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DC Balanced) Converter

文件：867.7 Kbytes Page：26 Pages

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to Single Embedded Clock DC-Balanced LVDS Converter

文件：1.01342 Mbytes Page：18 Pages

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to Single Embedded Clock DC-Balanced LVDS Converter

文件：1.01592 Mbytes Page：18 Pages

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DC Balanced) Converter

文件：867.7 Kbytes Page：26 Pages

封装/外壳：36-WFQFN 裸露焊盘 功能：串行器 包装：卷带（TR） 描述：IC LVDS/FPD LINK 5-43MHZ 36WQFN 集成电路（IC） 串行器，解串器

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DC Balanced) Converter

文件：867.7 Kbytes Page：26 Pages

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to Single Embedded Clock DC-Balanced LVDS Converter

文件：1.01592 Mbytes Page：18 Pages

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DC Balanced) Converter

文件：867.7 Kbytes Page：26 Pages

5-43 MHz FPD-Link LVDS (3 Data 1 Clock) to FPD-Link II LVDS (Embedded Clock DC Balanced) Converter

文件：867.7 Kbytes Page：26 Pages