DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

FEATURES • 20 to 85 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • 2.5 / 0 ns Set & Hold Times on TxINPUTs • Low Power Consumption • ±1V Common-Mode Range (around +1.2V) • Narrow Bus Reduces Cable Size and Cost • Up to 2.38 Gbps Throughput • Up to 297.5 Mbytes/sec

+3.3V 上升沿数据选通 LVDS 28 位频道链接接收器 - 85MHz

The DS90CR287 transmitter converts 28 bits of LVCMOS/LVTTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled • 20 to 85 MHz Shift Clock Support\n• 50% Duty Cycle on Receiver Output Clock\n• 2.5 / 0 ns Set & Hold Times on TxINPUTs\n• Low Power Consumption\n• ±1V Common-Mode Range (around +1.2V)\n• Narrow Bus Reduces Cable Size and Cost\n• Up to 2.38 Gbps Throughput\n• Up to 297.5 Mbytes/sec Bandwidth\n•;

28-Bit Channel Link-85MHz

文件：224.2 Kbytes Page：20 Pages

3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-85 MHz

文件：362.28 Kbytes Page：16 Pages

丝印代码：DS90CR288AMTD；DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

FEATURES • 20 to 85 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • 2.5 / 0 ns Set & Hold Times on TxINPUTs • Low Power Consumption • ±1V Common-Mode Range (around +1.2V) • Narrow Bus Reduces Cable Size and Cost • Up to 2.38 Gbps Throughput • Up to 297.5 Mbytes/sec

丝印代码：DS90CR288AMTD；DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

FEATURES • 20 to 85 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • 2.5 / 0 ns Set & Hold Times on TxINPUTs • Low Power Consumption • ±1V Common-Mode Range (around +1.2V) • Narrow Bus Reduces Cable Size and Cost • Up to 2.38 Gbps Throughput • Up to 297.5 Mbytes/sec

丝印代码：DS90CR288AMTD；DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

FEATURES • 20 to 85 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • 2.5 / 0 ns Set & Hold Times on TxINPUTs • Low Power Consumption • ±1V Common-Mode Range (around +1.2V) • Narrow Bus Reduces Cable Size and Cost • Up to 2.38 Gbps Throughput • Up to 297.5 Mbytes/sec

丝印代码：DS90CR288AMTD；DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

FEATURES • 20 to 85 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • 2.5 / 0 ns Set & Hold Times on TxINPUTs • Low Power Consumption • ±1V Common-Mode Range (around +1.2V) • Narrow Bus Reduces Cable Size and Cost • Up to 2.38 Gbps Throughput • Up to 297.5 Mbytes/sec

丝印代码：DS90CR288AMTD；DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

FEATURES • 20 to 85 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • 2.5 / 0 ns Set & Hold Times on TxINPUTs • Low Power Consumption • ±1V Common-Mode Range (around +1.2V) • Narrow Bus Reduces Cable Size and Cost • Up to 2.38 Gbps Throughput • Up to 297.5 Mbytes/sec

丝印代码：DS90CR288AMTD；DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

FEATURES • 20 to 85 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • 2.5 / 0 ns Set & Hold Times on TxINPUTs • Low Power Consumption • ±1V Common-Mode Range (around +1.2V) • Narrow Bus Reduces Cable Size and Cost • Up to 2.38 Gbps Throughput • Up to 297.5 Mbytes/sec

丝印代码：DS90CR288AMTD；DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

FEATURES • 20 to 85 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • 2.5 / 0 ns Set & Hold Times on TxINPUTs • Low Power Consumption • ±1V Common-Mode Range (around +1.2V) • Narrow Bus Reduces Cable Size and Cost • Up to 2.38 Gbps Throughput • Up to 297.5 Mbytes/sec

丝印代码：DS90CR288AMTD；DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

FEATURES • 20 to 85 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • 2.5 / 0 ns Set & Hold Times on TxINPUTs • Low Power Consumption • ±1V Common-Mode Range (around +1.2V) • Narrow Bus Reduces Cable Size and Cost • Up to 2.38 Gbps Throughput • Up to 297.5 Mbytes/sec

DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

文件：1.20938 Mbytes Page：24 Pages

3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-85 MHZ

文件：308.3 Kbytes Page：15 Pages

3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-85 MHz

文件：362.28 Kbytes Page：16 Pages

封装/外壳：56-TFSOP（0.240"，6.10mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC INTERFACE SPECIALIZED 56TSSOP 集成电路（IC） 专用

DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

文件：1.20938 Mbytes Page：24 Pages

DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

文件：1.20938 Mbytes Page：24 Pages

20 to 85 MHz Shift Clock Support, 50 Duty Cycle on Receiver Output Clock

文件：1.20908 Mbytes Page：24 Pages

DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

文件：1.20938 Mbytes Page：24 Pages

封装/外壳：56-TFSOP（0.240"，6.10mm 宽） 包装：卷带（TR） 描述：IC INTERFACE SPECIALIZED 56TSSOP 集成电路（IC） 专用

DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

文件：1.20938 Mbytes Page：24 Pages

DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

文件：1.20938 Mbytes Page：24 Pages

3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link Receiver - 75 MHz

文件：229.56 Kbytes Page：12 Pages

3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link Receiver - 75 MHz

文件：229.56 Kbytes Page：12 Pages