DS90CR286A价格
参考价格：￥39.8539
型号：DS90CR286AMTD 品牌：TI 备注：这里有DS90CR286A多少钱，2026年最近7天走势，今日出价，今日竞价，DS90CR286A批发/采购报价，DS90CR286A行情走势销售排行榜，DS90CR286A报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
DS90CR286A | DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz 1 Features 1• 20 to 66 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set and Hold Times on Rx Outputs • Rx Power Consumption 7 kV (HBM), > 700 V (EIAJ) • PLL Requi | TI 德州仪器 |   | |
DS90CR286A | +3.3V 上升沿数据选通 LVDS 28 位 Channel Link 接收器 - 66MHz The DS90CR286A receiver converts the four LVDS data streams back into parallel 28 bits of LVCMOS data. Also available is the DS90CR216A receiver that converts the three LVDS data streams back into parallel 21 bits of LVCMOS data. The outputs of both receivers strobe on the rising edge.The receiver L • 20 to 66 MHz Shift Clock Support\n• Best–in–Class Set and Hold Times on Rx Outputs\n• Rx Power-Down Mode 7 kV (HBM), > 700 V (EIAJ)\n• Compatible with TIA/EIA-644 LVDS Standard\n• Operating Temperature: −40°C to 85°C\n• Automotive Q Grade Available – AEC-Q100 Grade 3 Qualified; | TI 德州仪器 | | |
DS90CR286A | 3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link??6 MHz, 3.3V Rising Edge Strobe LVDS Receiver 21-Bit Channel Link??6 MHz 文件：250.02 Kbytes Page：12 Pages | NSC 国半 | | |
DS90CR286A | 3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link-66 MHz, 3.3V Rising Edge Strobe LVDS Receiver 21-Bit Channel Link-66 MHz 文件：312.6 Kbytes Page：13 Pages | NSC 国半 | | |
DS90CR286A | 3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link-66 MHz, 3.3V Rising Edge Strobe LVDS Receiver 21-Bit Channel Link-66 MHz 文件：378.71 Kbytes Page：14 Pages | NSC 国半 | | |
丝印代码：DS90CR286AMTD；DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz 1 Features 1• 20 to 66 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set and Hold Times on Rx Outputs • Rx Power Consumption 7 kV (HBM), > 700 V (EIAJ) • PLL Requi | TI 德州仪器 | | ||
丝印代码：DS90CR286AMTD；DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz 1 Features 1• 20 to 66 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set and Hold Times on Rx Outputs • Rx Power Consumption 7 kV (HBM), > 700 V (EIAJ) • PLL Requi | TI 德州仪器 | | ||
丝印代码：DS90CR286AMTD；DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz 1 Features 1• 20 to 66 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set and Hold Times on Rx Outputs • Rx Power Consumption 7 kV (HBM), > 700 V (EIAJ) • PLL Requi | TI 德州仪器 | | ||
丝印代码：DS90CR286AMTD；DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz 1 Features 1• 20 to 66 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set and Hold Times on Rx Outputs • Rx Power Consumption 7 kV (HBM), > 700 V (EIAJ) • PLL Requi | TI 德州仪器 | | ||
丝印代码：DS90CR286AMTD；DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz 1 Features 1• 20 to 66 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set and Hold Times on Rx Outputs • Rx Power Consumption 7 kV (HBM), > 700 V (EIAJ) • PLL Requi | TI 德州仪器 | | ||
丝印代码：DS90CR286AMTD；DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz 1 Features 1• 20 to 66 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set and Hold Times on Rx Outputs • Rx Power Consumption 7 kV (HBM), > 700 V (EIAJ) • PLL Requi | TI 德州仪器 | | ||
丝印代码：DS90CR286AQMT；DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz 1 Features 1• 20 to 66 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set and Hold Times on Rx Outputs • Rx Power Consumption 7 kV (HBM), > 700 V (EIAJ) • PLL Requi | TI 德州仪器 | | ||
丝印代码：DS90CR286AQMT；DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz 1 Features 1• 20 to 66 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set and Hold Times on Rx Outputs • Rx Power Consumption 7 kV (HBM), > 700 V (EIAJ) • PLL Requi | TI 德州仪器 | | ||
丝印代码：DS90CR286AQMT；DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz 1 Features 1• 20 to 66 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set and Hold Times on Rx Outputs • Rx Power Consumption 7 kV (HBM), > 700 V (EIAJ) • PLL Requi | TI 德州仪器 | | ||
丝印代码：DS90CR286AQMT；DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz 1 Features 1• 20 to 66 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set and Hold Times on Rx Outputs • Rx Power Consumption 7 kV (HBM), > 700 V (EIAJ) • PLL Requi | TI 德州仪器 | | ||
丝印代码：DS90CR286AQMT；DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz 1 Features 1• 20 to 66 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set and Hold Times on Rx Outputs • Rx Power Consumption 7 kV (HBM), > 700 V (EIAJ) • PLL Requi | TI 德州仪器 | | ||
丝印代码：DS90CR286AQMT；DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz 1 Features 1• 20 to 66 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set and Hold Times on Rx Outputs • Rx Power Consumption 7 kV (HBM), > 700 V (EIAJ) • PLL Requi | TI 德州仪器 | | ||
DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz 1 Features 1• 20 to 66 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set and Hold Times on Rx Outputs • Rx Power Consumption 7 kV (HBM), > 700 V (EIAJ) • PLL Requi | TI 德州仪器 | | ||
DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz 1 Features 1• 20 to 66 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set and Hold Times on Rx Outputs • Rx Power Consumption 7 kV (HBM), > 700 V (EIAJ) • PLL Requi | TI 德州仪器 | | ||
+3.3V 上升沿数据选通 LVDS 28 位汽车类 Channel Link 接收器 - 66MHz The DS90CR286A receiver converts the four LVDS data streams back into parallel 28 bits of LVCMOS data. Also available is the DS90CR216A receiver that converts the three LVDS data streams back into parallel 21 bits of LVCMOS data. The outputs of both receivers strobe on the rising edge.The receiver L • 20 to 66 MHz Shift Clock Support\n• Best–in–Class Set and Hold Times on Rx Outputs\n• Rx Power-Down Mode 7 kV (HBM), > 700 V (EIAJ)\n• Compatible with TIA/EIA-644 LVDS Standard\n• Operating Temperature: −40°C to 85°C\n• Automotive Q Grade Available – AEC-Q100 Grade 3 Qualified; | TI 德州仪器 | | ||
DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz 1 Features 1• 20 to 66 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set and Hold Times on Rx Outputs • Rx Power Consumption 7 kV (HBM), > 700 V (EIAJ) • PLL Requi | TI 德州仪器 | | ||
DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz 1 Features 1• 20 to 66 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set and Hold Times on Rx Outputs • Rx Power Consumption 7 kV (HBM), > 700 V (EIAJ) • PLL Requi | TI 德州仪器 | | ||
3.3V 上升沿数据选通信号 LVDS 接收器 28 位 Channel Link 66MHz DS90CR286AT-Q1 接收器可将四条 LVDS（低压差分信令）数据流转换回 28 位并行 LVCMOS 数据。接收器数据在输出时钟的上升沿输出选通信号。 接收器 LVDS 时钟的工作速率为 20MHz 至 66MHz。DS90CR286AT-Q1 会锁相至输入 LVDS 时钟、对 LVDS 数据线路上的串行位流进行采样、然后将其转换为 28 位并行输出数据。在 66MHz 的传入时钟速率下，每条 LVDS 输入线路均以 462Mbps 的位速率运行，最大吞吐量达 1.848Gbps。 DS90CR286AT-Q1 器件的接收器输出拥有更长的数据有效时间，相比上一代接收器有显著提升。DS • 20MHz 至 66MHz 移位时钟支持\n• 接收器输出时钟的占空比为 50%\n• 接收端输出拥有出色的建立和保持时间\n• 66MHz（最差情况下）时的接收功耗; | TI 德州仪器 | | ||
3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link-66 MHz, 3.3V Rising Edge Strobe LVDS Receiver 21-Bit Channel Link-66 MHz 文件：378.71 Kbytes Page：14 Pages | NSC 国半 | | ||
3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link-66 MHz, 3.3V Rising Edge Strobe LVDS Receiver 21-Bit Channel Link-66 MHz 文件：378.71 Kbytes Page：14 Pages | NSC 国半 | | ||
3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link??6 MHz, 3.3V Rising Edge Strobe LVDS Receiver 21-Bit Channel Link??6 MHz 文件：250.02 Kbytes Page：12 Pages | NSC 国半 | | ||
3.3-V Rising Edge Data Strobe LVDS Receiver 文件：2.40138 Mbytes Page：34 Pages | TI 德州仪器 | | ||
3.3-V Rising Edge Data Strobe LVDS Receiver 文件：2.40138 Mbytes Page：34 Pages | TI 德州仪器 | | ||
封装/外壳：56-TFSOP（0.240"，6.10mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC INTERFACE SPECIALIZED 56TSSOP 集成电路（IC） 专用 | TI 德州仪器 | | ||
3.3-V Rising Edge Data Strobe LVDS Receiver 文件：2.40138 Mbytes Page：34 Pages | TI 德州仪器 | | ||
3.3-V Rising Edge Data Strobe LVDS Receiver 文件：2.40138 Mbytes Page：34 Pages | TI 德州仪器 | | ||
3.3-V Rising Edge Data Strobe LVDS Receiver 文件：2.40138 Mbytes Page：34 Pages | TI 德州仪器 | | ||
封装/外壳：56-TFSOP（0.240"，6.10mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC INTERFACE SPECIALIZED 56TSSOP 集成电路（IC） 专用 | TI 德州仪器 | | ||
3.3-V Rising Edge Data Strobe LVDS Receiver 文件：2.40138 Mbytes Page：34 Pages | TI 德州仪器 | | ||
3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link-66 MHz, 3.3V Rising Edge Strobe LVDS Receiver 21-Bit Channel Link-66 MHz 文件：378.71 Kbytes Page：14 Pages | NSC 国半 | | ||
3.3-V Rising Edge Data Strobe LVDS Receiver 文件：2.40138 Mbytes Page：34 Pages | TI 德州仪器 | | ||
3.3-V Rising Edge Data Strobe LVDS Receiver 文件：2.40138 Mbytes Page：34 Pages | TI 德州仪器 | | ||
3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link-66 MHz, 3.3V Rising Edge Strobe LVDS Receiver 21-Bit Channel Link-66 MHz 文件：378.71 Kbytes Page：14 Pages | NSC 国半 | | ||
3.3-V Rising Edge Data Strobe LVDS Receiver 文件：2.40138 Mbytes Page：34 Pages | TI 德州仪器 | | ||
3.3-V Rising Edge Data Strobe LVDS Receiver 文件：2.40138 Mbytes Page：34 Pages | TI 德州仪器 | | ||
3.3-V Rising Edge Data Strobe LVDS Receiver 文件：2.40138 Mbytes Page：34 Pages | TI 德州仪器 | | ||
3.3-V Rising Edge Data Strobe LVDS Receiver 文件：2.40138 Mbytes Page：34 Pages | TI 德州仪器 | | ||
3.3-V Rising Edge Data Strobe LVDS Receiver 文件：2.40138 Mbytes Page：34 Pages | TI 德州仪器 | | ||
Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link 66 MHz 文件：2.10211 Mbytes Page：29 Pages | TI 德州仪器 | | ||
Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link 66 MHz 文件：2.10211 Mbytes Page：29 Pages | TI 德州仪器 | | ||
Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link 66 MHz 文件：2.10211 Mbytes Page：29 Pages | TI 德州仪器 | | ||
3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-66 MHz 文件：378.63 Kbytes Page：17 Pages | NSC 国半 | | ||
3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-66 MHz 文件：378.63 Kbytes Page：17 Pages | NSC 国半 | |
DS90CR286A产品属性
- 类型
描述
- Color depth (bpp)：
24
- Input compatibility：
LVDS
- Pixel clock frequency (Max) (MHz)：
66
- Output compatibility：
LVCMOS
- Features：
Low-EMI Point-to-Point Communication
- EMI reduction：
LVDS
- Operating temperature range (C)：
-40 to 85
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
NS |
19+ |
TSSOP |
8976 |
||||
TI |
25+ |
TSSOP-56 |
7786 |
原装正品现货,原厂订货,可支持含税原型号开票。 |
|||
NS |
25+ |
TSSOP |
2860 |
原厂原装正品价格优惠公司现货欢迎查询 |
|||
TI/德州仪器 |
2038+ |
TSSOP-56 |
8000 |
原装正品假一罚十 |
|||
TI |
25+ |
TSSOP56 |
6800 |
全新原装公司现货低价 |
|||
TI/德州仪器 |
2021+ |
TSSOP56 |
9000 |
原装现货,随时欢迎询价 |
|||
TI/德州仪器 |
23+ |
TSSOP56 |
18204 |
原装正品代理渠道价格优势 |
|||
TI |
25+ |
TSSOP56 |
9500 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
|||
德州仪器/TI |
24+ |
TSSOP56 |
2000 |
全新原装深圳仓库现货有单必成 |
|||
TI |
2025+ |
N/A |
70000 |
柒号只做原装 现货价秒杀全网 |
DS90CR286A规格书下载地址
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2020-7-1
DdatasheetPDF页码索引
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