+3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 75 MHz

General Description\nThe DS90CR217 transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of inp ■ 20 to 75 MHz shift clock support\n■ 50% duty cycle on receiver output clock\n■ Best–in–Class Set & Hold Times on TxINPUTs and RxOUTPUTs\n■ Low power consumption\n■ Tx + Rx Power-down mode <400µW (max)\n■ ±1V common mode range (around +1.2V)\n■ Narrow bus reduces cable size and cost\n■ Up to 1.;

3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link Receiver - 75 MHz

文件：239.59 Kbytes Page：12 Pages

丝印代码：DS90CR218AMTD；DS90CR218A 3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz

1FEATURES • 12 to 85 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Low Power Consumption • ±1V Common-mode Range (Around +1.2V) • Narrow Bus Reduces Cable Size and Cost • Up to 1.785 Gbps Throughput • Up to 223 Mbytes/sec Bandwidth • 345 mV (typ) Swing LVDS Device

丝印代码：DS90CR218AMTD；DS90CR218A 3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz

1FEATURES • 12 to 85 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Low Power Consumption • ±1V Common-mode Range (Around +1.2V) • Narrow Bus Reduces Cable Size and Cost • Up to 1.785 Gbps Throughput • Up to 223 Mbytes/sec Bandwidth • 345 mV (typ) Swing LVDS Device

丝印代码：DS90CR218AMTD；DS90CR218A 3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz

1FEATURES • 12 to 85 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Low Power Consumption • ±1V Common-mode Range (Around +1.2V) • Narrow Bus Reduces Cable Size and Cost • Up to 1.785 Gbps Throughput • Up to 223 Mbytes/sec Bandwidth • 345 mV (typ) Swing LVDS Device

丝印代码：DS90CR218AMTD；DS90CR218A 3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz

1FEATURES • 12 to 85 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Low Power Consumption • ±1V Common-mode Range (Around +1.2V) • Narrow Bus Reduces Cable Size and Cost • Up to 1.785 Gbps Throughput • Up to 223 Mbytes/sec Bandwidth • 345 mV (typ) Swing LVDS Device

丝印代码：DS90CR218AMTD；DS90CR218A 3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz

1FEATURES • 12 to 85 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Low Power Consumption • ±1V Common-mode Range (Around +1.2V) • Narrow Bus Reduces Cable Size and Cost • Up to 1.785 Gbps Throughput • Up to 223 Mbytes/sec Bandwidth • 345 mV (typ) Swing LVDS Device

丝印代码：DS90CR218AMTD；DS90CR218A 3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz

1FEATURES • 12 to 85 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Low Power Consumption • ±1V Common-mode Range (Around +1.2V) • Narrow Bus Reduces Cable Size and Cost • Up to 1.785 Gbps Throughput • Up to 223 Mbytes/sec Bandwidth • 345 mV (typ) Swing LVDS Device

丝印代码：DS90CR218AMTD；DS90CR218A 3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz

1FEATURES • 12 to 85 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Low Power Consumption • ±1V Common-mode Range (Around +1.2V) • Narrow Bus Reduces Cable Size and Cost • Up to 1.785 Gbps Throughput • Up to 223 Mbytes/sec Bandwidth • 345 mV (typ) Swing LVDS Device

丝印代码：DS90CR218AMTD；DS90CR218A 3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz

1FEATURES • 12 to 85 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Low Power Consumption • ±1V Common-mode Range (Around +1.2V) • Narrow Bus Reduces Cable Size and Cost • Up to 1.785 Gbps Throughput • Up to 223 Mbytes/sec Bandwidth • 345 mV (typ) Swing LVDS Device

DS90CR218A 3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz

1FEATURES • 12 to 85 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Low Power Consumption • ±1V Common-mode Range (Around +1.2V) • Narrow Bus Reduces Cable Size and Cost • Up to 1.785 Gbps Throughput • Up to 223 Mbytes/sec Bandwidth • 345 mV (typ) Swing LVDS Device

+3.3V 上升沿数据选通 LVDS 21 位频道链接接收器 - 85MHz

The DS90CR218A receiver deserializes three input LVDS data streams into 21 bits of CMOS/TTL output data. When operating at the maximum input clock rate of 85 Mhz, the LVDS data is received at 595 Mbps per data channel for a total data throughput of 1.785 Gbit/sec (233 Mbytes/sec).The narrow bus and • 12 to 85 MHz Shift Clock Support\n• 50% Duty Cycle on Receiver Output Clock\n• Low Power Consumption\n• ±1V Common-mode Range (Around +1.2V)\n• Narrow Bus Reduces Cable Size and Cost\n• Up to 1.785 Gbps Throughput\n• Up to 223 Mbytes/sec Bandwidth\n• 345 mV (typ) Swing LVDS Devices for Low EMI;

3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz

文件：911.3 Kbytes Page：17 Pages

3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 85 MHz

文件：282.72 Kbytes Page：15 Pages

3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz

文件：614.52 Kbytes Page：11 Pages

3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz

文件：614.52 Kbytes Page：11 Pages

3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz

文件：911.3 Kbytes Page：17 Pages

3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz

文件：614.52 Kbytes Page：11 Pages

3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 85 MHz

文件：282.72 Kbytes Page：15 Pages

3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz

文件：911.3 Kbytes Page：17 Pages

3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz

文件：911.3 Kbytes Page：17 Pages

3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz

文件：911.3 Kbytes Page：17 Pages

封装/外壳：48-TFSOP（0.240"，6.10mm 宽） 包装：托盘 描述：IC INTERFACE SPECIALIZED 48TSSOP 集成电路（IC） 专用

3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz

文件：911.3 Kbytes Page：17 Pages

3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 75 MHz

文件：281.49 Kbytes Page：15 Pages

封装/外壳：48-TFSOP（0.240"，6.10mm 宽） 包装：管件 描述：IC INTERFACE SPECIALIZED 48TSSOP 集成电路（IC） 专用