+3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link—65 MHz

General Description\nThe DS90CF363 transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of inp 20 to 65 MHz shift clock support\nSingle 3.3V supply\nChipset (Tx + Rx) power consumption<250 mW (typ)\nPower-down mode (<0.5 mW total)\nSingle pixel per clock XGA (1024x768) ready\nSupports VGA, SVGA, XGA and higher addressability.\nUp to 170 Megabytes/sec bandwidth\nUp to 1.3 Gbps throughput\nNarr;

3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link??5 MHz

文件：184.75 Kbytes Page：9 Pages

丝印代码：DS90CF363BMT；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

1FEATURES 2• No Special Start-up Sequence Required between Clock/Data and /PD Pins. Input Signal (Clock and Data) can be Applied Either Before or After the Device is Powered. • Support Spread Spectrum Clocking up to 100KHz Frequency Modulation & Deviations of ±2.5% Center Spread or −5&#

丝印代码：DS90CF363BMT；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

1FEATURES 2• No Special Start-up Sequence Required between Clock/Data and /PD Pins. Input Signal (Clock and Data) can be Applied Either Before or After the Device is Powered. • Support Spread Spectrum Clocking up to 100KHz Frequency Modulation & Deviations of ±2.5% Center Spread or −5&#

丝印代码：DS90CF363BMT；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

1FEATURES 2• No Special Start-up Sequence Required between Clock/Data and /PD Pins. Input Signal (Clock and Data) can be Applied Either Before or After the Device is Powered. • Support Spread Spectrum Clocking up to 100KHz Frequency Modulation & Deviations of ±2.5% Center Spread or −5&#

丝印代码：DS90CF363BMT；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

1FEATURES 2• No Special Start-up Sequence Required between Clock/Data and /PD Pins. Input Signal (Clock and Data) can be Applied Either Before or After the Device is Powered. • Support Spread Spectrum Clocking up to 100KHz Frequency Modulation & Deviations of ±2.5% Center Spread or −5&#

丝印代码：DS90CF363BMT；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

1FEATURES 2• No Special Start-up Sequence Required between Clock/Data and /PD Pins. Input Signal (Clock and Data) can be Applied Either Before or After the Device is Powered. • Support Spread Spectrum Clocking up to 100KHz Frequency Modulation & Deviations of ±2.5% Center Spread or −5&#

丝印代码：DS90CF363BMT；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

1FEATURES 2• No Special Start-up Sequence Required between Clock/Data and /PD Pins. Input Signal (Clock and Data) can be Applied Either Before or After the Device is Powered. • Support Spread Spectrum Clocking up to 100KHz Frequency Modulation & Deviations of ±2.5% Center Spread or −5&#

丝印代码：DS90CF363BMT；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

1FEATURES 2• No Special Start-up Sequence Required between Clock/Data and /PD Pins. Input Signal (Clock and Data) can be Applied Either Before or After the Device is Powered. • Support Spread Spectrum Clocking up to 100KHz Frequency Modulation & Deviations of ±2.5% Center Spread or −5&#

丝印代码：DS90CF363BMT；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

1FEATURES 2• No Special Start-up Sequence Required between Clock/Data and /PD Pins. Input Signal (Clock and Data) can be Applied Either Before or After the Device is Powered. • Support Spread Spectrum Clocking up to 100KHz Frequency Modulation & Deviations of ±2.5% Center Spread or −5&#

+3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-65 MHz

+3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-65 MHz\n+3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-65 MHzGeneral Description\nThe DS90C363A/DS90CF363A transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential\nSignaling) data st 20 to 65 MHz shift clock support\nRejects±3ns Jitter from VGA chip with less than 225ps output Jitter@65MHz (TJCC)\nBest–in–Class Set & Hold Times on TxINPUTs\nTx power consumption<130 mW (typ)@65MHz Grayscale\n50%Less Power Dissipation than BiCMOS Alternatives\nTx Power-down mode<200µW (max)\nE;

+3.3V 下降沿 LVDS 发送器 18 位平板显示器 (FPD) 链路 - 65MHz

The DS90CF363B transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of input data are sampled • No Special Start-up Sequence Required between Clock/Data and /PD Pins. Input Signal (Clock and Data) can be Applied Either Before or After the Device is Powered.\n• Support Spread Spectrum Clocking up to 100KHz Frequency Modulation & Deviations of ±2.5% Center Spread or −5% Down Spread.\n•;

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

1FEATURES 2• No Special Start-up Sequence Required between Clock/Data and /PD Pins. Input Signal (Clock and Data) can be Applied Either Before or After the Device is Powered. • Support Spread Spectrum Clocking up to 100KHz Frequency Modulation & Deviations of ±2.5% Center Spread or −5&#

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-65 MHz, 3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-65 MHz

文件：219.56 Kbytes Page：10 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-65 MHz, 3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-65 MHz

文件：219.56 Kbytes Page：10 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：612.69 Kbytes Page：11 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link - 65MHz

文件：612.62 Kbytes Page：11 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：922.04 Kbytes Page：15 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：900.37 Kbytes Page：15 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link - 65MHz

文件：612.62 Kbytes Page：11 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：922.04 Kbytes Page：15 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：900.37 Kbytes Page：15 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：612.69 Kbytes Page：11 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link - 65MHz

文件：612.62 Kbytes Page：11 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：922.04 Kbytes Page：15 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：922.04 Kbytes Page：15 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：900.37 Kbytes Page：15 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：922.04 Kbytes Page：15 Pages

封装/外壳：48-TFSOP（0.240"，6.10mm 宽） 包装：管件 描述：IC INTERFACE SPECIALIZED 48TSSOP 集成电路（IC） 专用

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：922.04 Kbytes Page：15 Pages

3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link??5 MHz

文件：184.75 Kbytes Page：9 Pages

封装/外壳：48-TFSOP（0.240"，6.10mm 宽） 包装：管件 描述：IC INTERFACE SPECIALIZED 48TSSOP 集成电路（IC） 专用