3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

FEATURES • No special start-up sequence required between clock/data and /PD pins. Input signal (clock and data) can be applied either before or after the device is powered. • Support Spread Spectrum Clocking up to 100kHz frequency modulation and deviations of ±2.5% center spread or −5&#

+3.3V 可编程 LVDS 发送器 18 位平板显示器 (FPD) 链路 - 65MHz

The DS90C363B transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of input data are sampled a • No special start-up sequence required between clock/data and /PD pins. Input signal (clock and data) can be applied either before or after the device is powered.\n• Support Spread Spectrum Clocking up to 100kHz frequency modulation and deviations of ±2.5% center spread or −5% down spread.\;

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：617.08 Kbytes Page：12 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：924.77 Kbytes Page：17 Pages

丝印代码：DS90C363BMT；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

FEATURES • No special start-up sequence required between clock/data and /PD pins. Input signal (clock and data) can be applied either before or after the device is powered. • Support Spread Spectrum Clocking up to 100kHz frequency modulation and deviations of ±2.5% center spread or −5&#

丝印代码：DS90C363BMT；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

FEATURES • No special start-up sequence required between clock/data and /PD pins. Input signal (clock and data) can be applied either before or after the device is powered. • Support Spread Spectrum Clocking up to 100kHz frequency modulation and deviations of ±2.5% center spread or −5&#

丝印代码：DS90C363BMT；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

FEATURES • No special start-up sequence required between clock/data and /PD pins. Input signal (clock and data) can be applied either before or after the device is powered. • Support Spread Spectrum Clocking up to 100kHz frequency modulation and deviations of ±2.5% center spread or −5&#

丝印代码：DS90C363BMT；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

FEATURES • No special start-up sequence required between clock/data and /PD pins. Input signal (clock and data) can be applied either before or after the device is powered. • Support Spread Spectrum Clocking up to 100kHz frequency modulation and deviations of ±2.5% center spread or −5&#

丝印代码：DS90C363BMT；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

FEATURES • No special start-up sequence required between clock/data and /PD pins. Input signal (clock and data) can be applied either before or after the device is powered. • Support Spread Spectrum Clocking up to 100kHz frequency modulation and deviations of ±2.5% center spread or −5&#

丝印代码：DS90C363BMT；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

FEATURES • No special start-up sequence required between clock/data and /PD pins. Input signal (clock and data) can be applied either before or after the device is powered. • Support Spread Spectrum Clocking up to 100kHz frequency modulation and deviations of ±2.5% center spread or −5&#

丝印代码：DS90C363BMT；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

FEATURES • No special start-up sequence required between clock/data and /PD pins. Input signal (clock and data) can be applied either before or after the device is powered. • Support Spread Spectrum Clocking up to 100kHz frequency modulation and deviations of ±2.5% center spread or −5&#

丝印代码：DS90C363BMT；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

FEATURES • No special start-up sequence required between clock/data and /PD pins. Input signal (clock and data) can be applied either before or after the device is powered. • Support Spread Spectrum Clocking up to 100kHz frequency modulation and deviations of ±2.5% center spread or −5&#

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：617.08 Kbytes Page：12 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：924.77 Kbytes Page：17 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：924.77 Kbytes Page：17 Pages

封装/外壳：48-TFSOP（0.240"，6.10mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC INTERFACE SPECIALIZED 48TSSOP 集成电路（IC） 专用

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：924.77 Kbytes Page：17 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：924.77 Kbytes Page：17 Pages

封装/外壳：48-TFSOP（0.240"，6.10mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC INTERFACE SPECIALIZED 48TSSOP 集成电路（IC） 专用

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

文件：924.77 Kbytes Page：17 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link??5 MHz, 3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link??5 MHz

文件：285.76 Kbytes Page：16 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-65 MHz, 3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-65 MHz

文件：219.56 Kbytes Page：10 Pages

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-65 MHz, 3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-65 MHz

文件：219.56 Kbytes Page：10 Pages