DS90C032QML LVDS Quad CMOS Differential Line Receiver

1FEATURES 2• Single Event Latchup (SEL) Immune 120 MeVcm2/ mg • High Impedance LVDS Inputs with Power-Off. • Accepts Small Swing (330 mV) Differential Signal Levels • Low Power Dissipation • Low Differential Skew • Low Chip to Chip Skew • Pin Compatible with DS26C32A • Compatible with IE

DS90C032 LVDS Quad CMOS Differential Line Receiver

1FEATURES 2• >155.5 Mbps (77.7 MHz) switching rates • Accepts small swing (350 mV) differential signal levels • Ultra low power dissipation • 600 ps maximum differential skew (5V, 25°C) • 6.0 ns maximum propagation delay • Industrial operating temperature range • Military operating tempera

LVDS Quad CMOS Differential Line Receiver

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LVDS Quad CMOS Differential Line Receiver

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LVDS Quad CMOS Differential Line Receiver

文件：352.97 Kbytes Page：12 Pages

LVDS Quad CMOS Differential Line Receiver

文件：160.65 Kbytes Page：9 Pages