Quad NOR Unified Bus Receiver

General Description\nThe DS7836/DS8836 are quad 2-input receivers designed for use in bus organized data transmission systems interconnected by terminated 120Ximpedance lines. The external termination is intended to be 180Xresistor from the bus to the a5V logic supply together with a 390Xresistor fr Low input current with normal VCC or VCC = 0V (15 mA typ)\nBuilt-in input hysteresis (1V typ)\nHigh noise immunity (2V typ)\nTemperature-insensitive input thresholds track bus logic levels\nTTL compatible output\nMatched, optimized noise immunity for ``1'' and ``0'' levels\nHigh speed (18 ns typ) ;

Quad NOR Unified Bus Receiver

文件：108.79 Kbytes Page：4 Pages

Quad NOR Unified Bus Receiver

文件：108.79 Kbytes Page：4 Pages

Vertical Deflection Output Circuit with Driver for TV Sets and Monitors

Overview The LA7836 is an IC that contains the vertical deflection output circuit with a driver for color, B/W TV sets, monitors, and display units with a large aperture (maximum deflection current 2.2Ap-p) and is placed in an SIP13H package. The LA7836 features fewer external parts and low

POWER ZENERS

DESCRIPTION Fused-in-glass, metallurgically bonded 6 watt leaded zeners and 10 watt stud-type- zeners. FEATURES ● High Surge Rating ● Small Physical Size ● Leaded and Stud Packages Available

HEXFET Power MOSFET

文件：249.22 Kbytes Page：9 Pages