(512 x 8) 4096-Bit TTL PROM

General Description This Schottky memory is organized in the popular 512 words by 8 bits configuration. A memory enable input is provided to control the output states. When the device is enabled, the outputs represent the contents of the selected word. When disabled, the 8 outputs go to the ‘‘O

(512 x 8) 4096-Bit TTL PROM

General Description This Schottky memory is organized in the popular 512 words by 8 bits configuration. A memory enable input is provided to control the output states. When the device is enabled, the outputs represent the contents of the selected word. When disabled, the 8 outputs go to the ‘‘O

(512 x 8) 4096-Bit TTL PROM

General Description This Schottky memory is organized in the popular 512 words by 8 bits configuration. A memory enable input is provided to control the output states. When the device is enabled, the outputs represent the contents of the selected word. When disabled, the 8 outputs go to the ‘‘O

(512 x 8) 4096-Bit TTL PROM

General Description This Schottky memory is organized in the popular 512 words by 8 bits configuration. A memory enable input is provided to control the output states. When the device is enabled, the outputs represent the contents of the selected word. When disabled, the 8 outputs go to the ‘‘O

(512 x 8) 4096-Bit TTL PROM

General Description This Schottky memory is organized in the popular 512 words by 8 bits configuration. A memory enable input is provided to control the output states. When the device is enabled, the outputs represent the contents of the selected word. When disabled, the 8 outputs go to the ‘‘O