Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs

GENERAL DESCRIPTION The DS3251 (single), DS3252 (dual), DS3253 (triple), and DS3254 (quad) line interface units (LIUs) perform the functions necessary for interfacing at the physical layer to DS3, E3, or STS-1 lines. Each LIU has independent receive and transmit paths and a built-in jitter attenu

单/双/三/四路、DS3/E3/STS-1 LIU

DS3251 (单)、DS3252 (双)、DS3253 (三)和DS3254 (四)线路接口单元(LIU)用来实现物理层到DS3、E3或STS-1线路接口的必要功能。每个LIU都具有独立的接收与发送通道以及内置的抖动衰减器。片上时钟适配器根据单个输入时钟产生所有线路速率时钟。控制接口选项包括8位并行、SPI和硬件模式。 \n• 该系列产品引脚兼容 \n• 每个端口可独立配置 \n• 为长达380米(DS3)、440米(E3)或360米(STS-1)的75Ω同轴电缆提供接收时钟和数据恢复 \n• 标准发送波形 \n• 三种控制接口选择：8位并行、SPI和硬件模式 \n• 可放置在接收或发送通道的内置抖动衰减器 \n• 抖动衰减器的临时缓冲深度：16、32、64或128位 \n• 内置时钟适配器从单个输入时钟产生所有的传输线时钟(DS3、E3、STS-1、OC-3的19.44MHz、38.88MHz或77.76MHz) \n• B3ZS/HDB3编码与解码 \n• 需要最少的外部元件 \n• 本地与远程环回 \n;

Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs

文件：909.17 Kbytes Page：71 Pages

封装/外壳：144-BGA，CSPBGA 功能：线路接口单元（LIU） 包装：托盘 描述：IC TELECOM INTERFACE 144CSBGA 集成电路（IC） 电信

Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs

GENERAL DESCRIPTION The DS3251 (single), DS3252 (dual), DS3253 (triple), and DS3254 (quad) line interface units (LIUs) perform the functions necessary for interfacing at the physical layer to DS3, E3, or STS-1 lines. Each LIU has independent receive and transmit paths and a built-in jitter attenu

封装/外壳：144-BGA，CSPBGA 功能：线路接口单元（LIU） 包装：托盘 描述：IC TELECOM INTERFACE 144CSBGA 集成电路（IC） 电信

Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs

文件：909.17 Kbytes Page：71 Pages

Quad Gated Non-Inverting Power Driver

Description The CA3252 is used to interface low-level logic to high current loads. Each Power Driver has four inverting switches consisting of an inverting logic input stage and an inverting low-side driver output stage. All inputs are 5V TTL/CMOS logic compatible and have a common Enable input

Quad Gated Non-Inverting Power Driver

Description The CA3252 is used to interface low-level logic to high current loads. Each Power Driver has four inverting switches consisting of an inverting logic input stage and an inverting low-side driver output stage. All inputs are 5V TTL/CMOS logic compatible and have a common Enable input

Quad Gated Non-Inverting Power Driver

Description The CA3252 is used to interface low-level logic to high current loads. Each Power Driver has four inverting switches consisting of an inverting logic input stage and an inverting low-side driver output stage. All inputs are 5V TTL/CMOS logic compatible and have a common Enable input

CMOS System Reset

Outline This IC is a system reset IC developed using the CMOS process. Super low consumption current of 0.25µA typ. has been achieved through use of the CMOS process. Also, detection voltage is high precision detection of ±2. Features 1. Super low consumption current 0.25µA typ. (when VDD