单/双/三/四路ATM/分组PHY，用于DS3/E3/STS-1

DS3161、DS3162、DS3163和DS3164 (DS316x)集成了ATM信元/HDLC数据包处理器，具有DS3/E3成帧器和LIU，能够将ATM信元或数据包映射/反映射为多达四路的DS3/E3数据流，在每个端口提供DS3帧、E3帧或纯信道数据流。 \n• 单路(DS3161)、双路(DS3162)、三路(DS3163)或四路(DS3164)集成LI ATM/分组PHY，用于DS3、E3和纯信道52Mbps (CC52) \n• 引脚兼容，易于在同一PCB平台实现不同的端口密度 \n• 每个端口可独立配置 \n• 通用PHY将ATM信元和/或HDLC数据包映射为DS3或E3数据流 \n• UTOPIA L2/L3或POS-PHY™ L2/L3或SPI-3接口，提供8位、16位或32位总线宽度 \n• 66MHz UTOPIA L3和POS-PHY L3时钟 \n• 52MHz UTOPIA L2和POS-PHY L2时钟 \n• 在POS;

Single/Dual/Triple/Quad ATM/Packet PHYs for DS3/E3/STS-1

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5-Bit Programmable 2-Phase Synchronous Buck Controller

GENERAL DESCRIPTION The ADP3162 is a highly efficient dual output synchronous buck switching regulator controller optimized for converting a 5 V or 12 V main supply into the core supply voltage required by high-performance processors such as Tualatin. The ADP3162 uses an internal 5-bit DAC to rea

5-Bit Programmable 2-Phase Synchronous Buck Controller

GENERAL DESCRIPTION The ADP3162 is a highly efficient dual output synchronous buck switching regulator controller optimized for converting a 5 V or 12 V main supply into the core supply voltage required by high-performance processors such as Tualatin. The ADP3162 uses an internal 5-bit DAC to rea

Single Chip Radio Transceiver

文件：399.07 Kbytes Page：18 Pages

Single Chip Radio Transceiver

文件：399.07 Kbytes Page：18 Pages

Single Chip Radio Transceiver

文件：399.07 Kbytes Page：18 Pages