DS26C32AT/DS26C32AM Quad Differential Line Receiver

1FEATURES 2• CMOS Design for Low Power • ±0.2V Sensitivity over Input Common Mode Voltage Range • Typical Propagation Delays: 19 ns • Typical Input hysteresis: 60 mV • Inputs Won't Load Line When VCC = 0V • Meets the Requirements of EIA Standard RS-422 • TRI-STATE Outputs for Connection to

DS26C32AT/DS26C32AM Quad Differential Line Receiver

文件：958.83 Kbytes Page：16 Pages

DS26C32AT/DS26C32AM Quad Differential Line Receiver

1FEATURES 2• CMOS Design for Low Power • ±0.2V Sensitivity over Input Common Mode Voltage Range • Typical Propagation Delays: 19 ns • Typical Input hysteresis: 60 mV • Inputs Won't Load Line When VCC = 0V • Meets the Requirements of EIA Standard RS-422 • TRI-STATE Outputs for Connection to

QUADRUPLE DIFFERENTIAL LINE RECEIVER

description/ordering information The AM26C32 is a quadruple differential line receiver for balanced or unbalanced digital data transmission. The enable function is common to all four receivers and offers a choice of active-high or active-low input. The 3-state outputs permit connection direc

QUADRUPLE DIFFERENTIAL LINE RECEIVER

文件：541.21 Kbytes Page：17 Pages

QUADRUPLE DIFFERENTIAL LINE RECEIVER

文件：691.78 Kbytes Page：19 Pages

QUADRUPLE DIFFERNTIAL LINE RECEIVER

文件：832.1 Kbytes Page：20 Pages

QUADRUPLE DIFFRENTIAL LINE RECEIVER

文件：841.17 Kbytes Page：20 Pages