逻辑电路

逻辑电路

3-to-8 line decoder/demultiplexer; inverting

GENERAL DESCRIPTION The 74HC/HCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Demultiplexing capability • Multiple input enable for easy expansion • Ideal for memory

1-of-8 Decoder/Demultiplexer

The MC74HC138A is identical in pinout to the LS138. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC138A decodes a three−bit Address to one−of−eight active−low outputs. This device features three Chip Select inputs,

1-of-8 Decoder/Demultiplexer

The MC74HC138A is identical in pinout to the LS138. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC138A decodes a three−bit Address to one−of−eight active−low outputs. This device features three Chip Select inputs,

1-of-8 Decoder/Demultiplexer

The MC74HC138A is identical in pinout to the LS138. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC138A decodes a three−bit Address to one−of−eight active−low outputs. This device features three Chip Select inputs,

1-of-8 Decoder/Demultiplexer

The MC74HC138A is identical in pinout to the LS138. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC138A decodes a three−bit Address to one−of−eight active−low outputs. This device features three Chip Select inputs,