Features

• Flash-programmable capacitor tuning array for low

ppm initial frequency clock output

• Low clock output jitter

— 4 ps typ. RMS period jitter

— ±30 ps typ. peak-to-peak period jitter

• Flash-programmable dividers

• Two-pin programming interface

• On-chip oscillator runs from 10–48-MHz crystal

• Five selectable post-divide options, using reference

oscillator output

• Programmable asynchronous or synchronous OE and

PWR_DWN modes

• 2.7V to 3.6V operation

• Controlled rise and fall times and output slew rate

Benefits

• Enables fine-tuning of output clock frequency by

adjusting CLoad of the crystal

• Allows multiple programming opportunities to correct

errors, and control excess inventory

• Enables programming of output frequency after

packaging

• PPM clock output error can be adjusted in package

• Provides flexibility in output configurations and testing

• Enables low-power operation or output enable function

• Provides flexibility for system applications through

selectable instantaneous or synchronous change in

outputs

• Enables encapsulation in small-size, surface-mount

packages