Description

The CS47L15 is a highly integrated, low-power audio hub for smartphones, tablets, and other portable audio devices

including wearable technology. It combines an advanced DSP feature set with a flexible, high-performance audio hub

codec. The CS47L15 combines a programmable DSP core with a variety of power-efficient fixed-function audio

processors. An SPI master interface is provided, for autonomous boot-up and configuration using an external non-volatile

memory—enabling the CS47L15 to be used independently of a host processor.

The DSP core supports advanced audio processing functions such as wideband noise reduction, acoustic-echo

cancelation (AEC), speech enhancement, karaoke, and many more. Low-power analog and digital interfaces provide

flexible support for always-on voice applications and speaker-protection algorithms implemented on the programmable

DSP core. The DSP core is integrated within a fully flexible, all-digital mixing and routing engine with sample-rate

converters, for wide use-case flexibility. Support for third-party DSP programming provides far-reaching opportunities for

product differentiation.

Three digital audio interfaces are provided, each supporting a wide range of standard audio sample rates and serial

interface formats. Automatic sample-rate detection enables seamless wideband/narrowband voice-call handover. The

DACs and output paths provide full support for high definition audio throughout the entire signal chain.

The stereo headphone driver provides ground-referenced output, with noise levels as low as 0.45 VRMS for hi-fi quality

line or headphone output. The CS47L15 also features a mono bridge-tied load (BTL) earpiece output, mono 2.5-W Class D

speaker driver, two channels of stereo PDM output, and an IEC-60958-3–compatible S/PDIF transmitter. A signal

generator for controlling haptics devices is included; vibe actuators can connect directly to the Class D speaker output, or

via an external driver on the PDM output interface.

The CS47L15 supports up to five analog inputs, and up to four PDM digital inputs. As many as four analog microphone

connections can be supported; a separate analog input channel is provided for use in speaker-protection applications.

Microphone activity detection with interrupt is available. A smart accessory interface supports most standard 3.5-mm

accessories. Impedance sensing and measurement is provided for external accessory and push-button detection

(Android™ headset specification compliant).

The CS47L15 supports SPI™ and I2C interface modes for control-register access. The CS47L15 can also be configured

as SPI master, enabling autonomous boot-up and configuration without dependency on a host processor. Two integrated

FLLs support a wide range of system-clock frequencies. The device is powered from 1.8- and 1.2-V supplies. Separate

MICVDD input can be supported, for microphone operation above 1.8 V. An additional supply is required for the Class D

speaker drivers (typically direct connection to 4.2-V battery). The power, clocking, and output driver architectures are

designed to maximize battery life in voice, music, and standby modes. Low-power (25 W) Sleep Mode is supported, with

configurable wake-up events.

Features

• 150 MIPS, 150 MMAC audio-signal processor

— Low-power, always-on voice trigger capability

— Speaker protection algorithm support

— Event loggers with time-stamp and interrupt functions

• Programmable wideband audio processing

— Transmit-path noise reduction and echo cancelation

• Integrated multichannel 24-bit hi-fi audio hub codec

— 98-dB signal-to-noise ratio (SNR) mic input (48 kHz)

— 127-dB SNR headphone playback (48 kHz)

— Low-power analog input modes

• Up to four analog or four digital microphone (DMIC)

inputs

— Speaker-monitoring input path (analog or digital)

• Stereo headphone/earpiece/line output driver: 30 mW

into 32- load at 0.1 total harmonic distortion + noise

(THD+N)

• Earpiece, speaker, and digital (pulse-density modulation,

PDM) output interfaces

— Two-way stereo PDM interface

• Three full digital-audio interfaces

— Standard sample rates from 8 to 192 kHz

— Multichannel support on AIF1 and AIF2

• Self-boot capability from external non-volatile memory

• Flexible clocking, derived from MCLKn or AIFn

• Low-power frequency-locked loops (FLLs) support

reference clocks down to 32 kHz

• Advanced accessory detection functions

• Configurable functions on up to 15 general-purpose

input/output (GPIO) pins

• Small WLCSP package, 0.4-mm ball array

Applications

• Smartphones, tablets, and wearable technology

— Karaoke algorithm support