CY7C144集成电路资料原装现货专卖赛普拉斯-IC资料网

您好,欢迎来到114ic资料网！

114ic电子网登录注册

芯片资料

数据手册
丝印反查
库存查询
行业新闻
生产厂家
替换型号
晶体管

精确

位置：首页 > IC中文资料第1430页 > CY7C144

CY7C144价格

参考价格：￥547.2085

型号：CY7C1440AV25-167BZXC 品牌：Cynergy 3 备注：这里有CY7C144多少钱，2025年最近7天走势，今日出价，今日竞价，CY7C144批发/采购报价，CY7C144行情走势销售排行榜，CY7C144报价。

型号	功能描述	生产厂家企业	LOGO
CY7C144	8K x 8/9 Dual-Port Static RAM with Sem, Int, Busy 文件：391.37 Kbytes Page：19 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C144	8K x 8/9 Dual-Port Static RAM with SEM, INT, BUSY 文件：607.9 Kbytes Page：20 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C144	8K x 8/9 Dual-Port Static RAM with SEM, INT, BUSY	Infineon 英飞凌	Infineon
CY7C1440AV33	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1440AV33-167AXC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1440AV33-167BZC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1440AV33-167BZXC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1440AV33-200AXC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1440AV33-200BZC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1440AV33-200BZXC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1440AV33-250AXC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1440AV33-250BZC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1440AV33-250BZXC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1441AV25-100AXC	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1441AV25-100AXI	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1441AV25-100BZC	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1441AV25-100BZI	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1441AV25-100BZXC	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1441AV25-100BZXI	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1441AV25-133AXC	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1441AV25-133AXI	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1441AV25-133BZC	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1441AV25-133BZI	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1441AV25-133BZXC	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1441AV25-133BZXI	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1441AV33	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1442AV33	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1442AV33-167AXC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1442AV33-167BZC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1442AV33-167BZXC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1442AV33-200AXC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1442AV33-200BZC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1442AV33-200BZXC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1442AV33-250AXC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1442AV33-250BZC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1442AV33-250BZXC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1443AV33	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1443AV33-100AXC	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1443AV33-100AXI	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1443AV33-100BZC	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1443AV33-100BZI	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1443AV33-100BZXC	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1443AV33-100BZXI	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1443AV33-133AXC	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1443AV33-133AXI	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1443AV33-133BZC	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1443AV33-133BZI	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1443AV33-133BZXC	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1443AV33-133BZXI	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1446AV33	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1446AV33-167BGC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1446AV33-167BGXC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1446AV33-200BGC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1446AV33-200BGXC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1446AV33-250BGC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1446AV33-250BGXC	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM Functional Description[1] The CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1447AV33	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1447AV33-100BGC	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1447AV33-100BGI	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1447AV33-100BGXC	36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM Functional Description The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33[1] are 3.3 V, 1 M × 36/2 M × 18/512 K × 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version)	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress

CY7C144产品属性

类型
描述
型号
CY7C144
功能描述
静态随机存取存储器 36MB(1Mx36) 2.5v 167MHz Sync 静态随机存取存储器
RoHS
否
制造商
Cypress Semiconductor
存储容量
16 Mbit
组织
1 M x 16
访问时间
55 ns
电源电压-最大
3.6 V
电源电压-最小
2.2 V
最大工作电流
22 uA
最大工作温度
+ 85 C
最小工作温度
- 40 C
安装风格
SMD/SMT
封装/箱体
TSOP-48
封装
Tray

CY7C144供应商更多...

更新时间：2025-9-24 23:13:00

IC供应商	芯片型号	品牌	批号	封装	库存	备注	价格
深圳诚思涵科技有限公司	CY7C144AV-25AXC	CYPRESS/赛普拉斯	24+	TQFP64	8000	只做原装正品现货	询价
深圳市得捷芯城科技有限公司	CY7C1441KV33-133AXIT	CYPRESS(赛普拉斯)	24+	LQFP-100	5591	百分百原装正品,可原型号开票	询价
深圳市纳艾斯科技有限公司	CY7C144AV-25AIT	CYPRESS	24+	TQFP	8000	只做自己库存,全新原装进口正品假一赔百,可开13%增	询价
深圳市科芯源微电子有限公司	CY7C1440AV25-167BZC	CYPRESS/赛普拉斯	25+	BGA	102	原装正品,假一罚十!	询价
天津市博通航睿技术有限公司	CY7C1440AV25-167BZC	ADI	23+	BGA	7000		询价
深圳市恒凯威科技开发有限公司	CY7C144AV-25AXC	CYPRESS/赛普拉斯	21+	TQFP64	9080	只做原装,质量保证	询价
华富测量(深圳)传感技术有限公司	CY7C1440AV25-167BZC	CYPRESS	2138+	原厂标准封装	8960	代理CYPRESS全系列芯片,原装现货	询价
深圳市汇莱威科技有限公司	cy7c1441av33-133axi	CYPRESS	24+	QFP	13500	免费送样原盒原包现货一手渠道联系	询价
深圳市毅创腾电子科技有限公司	CY7C1440AV25-167BZXC	Cypress	23+	165-FBGA(15x17)	24840	专业分销产品!原装正品!价格优势!	询价
深圳市冠亿通科技有限公司	CY7C1441KV33-133AXI	Cypress(赛普拉斯)	25+		5000	只做原装假一罚百可开票可售样	询价

CY7C144芯片相关品牌

CY7C144规格书下载地址

CY7C144参数引脚图相关

CY7C144数据表相关新闻

CY7C15632KV18-500BZXI
进口代理
2024-11-25
CY7C1565KV18-500BZXI
进口代理
2023-10-24
CY7C1462AV33-167AXC 原装现货
CY7C1462AV33-167AXC 可做含税，支持实单
2021-9-18
CY7C1399B-12ZC 十年IC，一家专业军工级IC供货商
CY7C1399B-12ZC CY7C1399B-12ZC，ALTERA（阿尔特拉），军工级IC专业优势渠道
2020-7-16
CY7C1399B-12ZC十年IC，一家专业军工级IC供货商
CY7C1399B-12ZC十年IC，一家专业军工级IC供货商
2020-7-15
CY7C1370D-167AXI产品资料 CYPRESS/赛普拉斯
CY7C1370D-167AXI产品资料
2020-6-28

DdatasheetPDF页码索引

P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
P24
P25
P26
P27
P28
P29
P30
P31
P32
P33
P34
P35
P36
P37
P38
P39
P40
P41
P42
P43
P44
P45
P46
P47
P48
P49
P50
P51
P52
P53
P54
P55
P56
P57
P58
P59
P60
P61
P62
P63
P64
P65
P66
P67
P68
P69
P70
P71
P72
P73
P74
P75
P76
P77
P78
P79
P80
P81
P82
P83
P84
P85
P86
P87
P88
P89
P90
P91
P92
P93
P94
P95
P96
P97
P98
P99
P100
P101
P102
P103
P104
P105

您好,欢迎来到114ic资料网！

CY7C144价格

CY7C144产品属性

CY7C144供应商更多...

CY7C144芯片相关品牌

CY7C144规格书下载地址

CY7C144参数引脚图相关

CY7C144数据表相关新闻

CY7C15632KV18-500BZXI

CY7C1565KV18-500BZXI

CY7C1462AV33-167AXC 原装现货

CY7C1399B-12ZC 十年IC，一家专业军工级IC供货商

CY7C1399B-12ZC十年IC，一家专业军工级IC供货商

CY7C1370D-167AXI产品资料 CYPRESS/赛普拉斯

DdatasheetPDF页码索引