封装/外壳：100-LQFP 包装：散装托盘 描述：IC SRAM 9MBIT PARALLEL 100TQFP 集成电路（IC） 存储器

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM

Functional Description[1] The CY7C1361C/CY7C1363C is a 3.3V, 256K x 36 and 512K x 18 Synchronous Flowthrough SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM

Functional Description[1] The CY7C1361C/CY7C1363C is a 3.3V, 256K x 36 and 512K x 18 Synchronous Flowthrough SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM

Functional Description[1] The CY7C1361C/CY7C1363C is a 3.3V, 256K x 36 and 512K x 18 Synchronous Flowthrough SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM

文件：567.48 Kbytes Page：31 Pages

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM

文件：567.48 Kbytes Page：31 Pages