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CY7C1320价格
参考价格：￥114.0803
型号：CY7C1320CV18-250BZC 品牌：CYPRESS 备注：这里有CY7C1320多少钱，2025年最近7天走势，今日出价，今日竞价，CY7C1320批发/采购报价，CY7C1320行情走势销售排行榜，CY7C1320报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316AV18/CY7C1318AV18/CY7C1320AV18 are 1.8V Synchronous Pipelined SRAM equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features • 18-Mb density (2M x 8, 1M x 18, 512K | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 |   | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316AV18/CY7C1318AV18/CY7C1320AV18 are 1.8V Synchronous Pipelined SRAM equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features • 18-Mb density (2M x 8, 1M x 18, 512K | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316AV18/CY7C1318AV18/CY7C1320AV18 are 1.8V Synchronous Pipelined SRAM equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features • 18-Mb density (2M x 8, 1M x 18, 512K | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316AV18/CY7C1318AV18/CY7C1320AV18 are 1.8V Synchronous Pipelined SRAM equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features • 18-Mb density (2M x 8, 1M x 18, 512K | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Features • 18-Mbit density (2M x 8, 2M x 9, 1M x 18, 512K x 36) • 300-MHz clock for high bandwidth • 2-Word burst for reducing address bus frequency • Double Data Rate (DDR) interfaces (data transferred at 600 MHz) @ 300 MHz • Two input clocks (K and K) for precise DDR timing — SRAM u | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Features • 18-Mbit density (2M x 8, 2M x 9, 1M x 18, 512K x 36) • 300-MHz clock for high bandwidth • 2-Word burst for reducing address bus frequency • Double Data Rate (DDR) interfaces (data transferred at 600 MHz) @ 300 MHz • Two input clocks (K and K) for precise DDR timing — SRAM u | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Features • 18-Mbit density (2M x 8, 2M x 9, 1M x 18, 512K x 36) • 300-MHz clock for high bandwidth • 2-Word burst for reducing address bus frequency • Double Data Rate (DDR) interfaces (data transferred at 600 MHz) @ 300 MHz • Two input clocks (K and K) for precise DDR timing — SRAM u | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Features • 18-Mbit density (2M x 8, 2M x 9, 1M x 18, 512K x 36) • 300-MHz clock for high bandwidth • 2-Word burst for reducing address bus frequency • Double Data Rate (DDR) interfaces (data transferred at 600 MHz) @ 300 MHz • Two input clocks (K and K) for precise DDR timing — SRAM u | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316JV18, CY7C1916JV18, CY7C1318JV18, and CY7C1320JV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Features ■ 18-Mbit d | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316JV18, CY7C1916JV18, CY7C1318JV18, and CY7C1320JV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Features ■ 18-Mbit d | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316JV18, CY7C1916JV18, CY7C1318JV18, and CY7C1320JV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Features ■ 18-Mbit d | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316JV18, CY7C1916JV18, CY7C1318JV18, and CY7C1320JV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Features ■ 18-Mbit d | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture Functional Description The CY7C1316JV18, CY7C1916JV18, CY7C1318JV18, and CY7C1320JV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Features ■ 18-Mbit d | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR II SRAM Two-Word Burst Architecture Functional Description The CY7C1316KV18, CY7C1916KV18, CY7C1318KV18, and CY7C1320KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features ■ 18-Mbit density | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR II SRAM Two-Word Burst Architecture Functional Description The CY7C1316KV18, CY7C1916KV18, CY7C1318KV18, and CY7C1320KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features ■ 18-Mbit density | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR II SRAM Two-Word Burst Architecture Functional Description The CY7C1316KV18, CY7C1916KV18, CY7C1318KV18, and CY7C1320KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features ■ 18-Mbit density | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR II SRAM Two-Word Burst Architecture Functional Description The CY7C1316KV18, CY7C1916KV18, CY7C1318KV18, and CY7C1320KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features ■ 18-Mbit density | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR II SRAM Two-Word Burst Architecture Functional Description The CY7C1316KV18, CY7C1916KV18, CY7C1318KV18, and CY7C1320KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features ■ 18-Mbit density | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR II SRAM Two-Word Burst Architecture Functional Description The CY7C1316KV18, CY7C1916KV18, CY7C1318KV18, and CY7C1320KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features ■ 18-Mbit density | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR II SRAM Two-Word Burst Architecture Functional Description The CY7C1316KV18, CY7C1916KV18, CY7C1318KV18, and CY7C1320KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features ■ 18-Mbit density | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR II SRAM Two-Word Burst Architecture Functional Description The CY7C1316KV18, CY7C1916KV18, CY7C1318KV18, and CY7C1320KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features ■ 18-Mbit density | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR II SRAM Two-Word Burst Architecture Functional Description The CY7C1316KV18, CY7C1916KV18, CY7C1318KV18, and CY7C1320KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features ■ 18-Mbit density | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR II SRAM 2-Word Burst Architecture 文件：1.13891 Mbytes Page：23 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR II SRAM 2-Word Burst Architecture 文件：1.13891 Mbytes Page：23 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR II SRAM 2-Word Burst Architecture 文件：1.13891 Mbytes Page：23 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
封装/外壳：165-LBGA 包装：托盘 描述：IC SRAM 18MBIT PARALLEL 165FBGA 集成电路（IC） 存储器 | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture | Infineon 英飞凌 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture | Infineon 英飞凌 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture 文件：515.89 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture 文件：515.89 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
封装/外壳：165-LBGA 包装：卷带（TR） 描述：IC SRAM 18MBIT PARALLEL 165FBGA 集成电路（IC） 存储器 | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture 文件：515.89 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture 文件：515.89 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture 文件：515.89 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture 文件：515.89 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture 文件：515.89 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture 文件：515.89 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture 文件：515.89 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture 文件：515.89 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture 文件：515.89 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture 文件：1.71052 Mbytes Page：31 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture 文件：515.89 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit DDR-II SRAM 2-Word Burst Architecture 文件：515.89 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | |
CY7C1320产品属性
- 类型
描述
- 型号
CY7C1320
- 制造商
Cypress Semiconductor
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
CYPRESS/赛普拉斯 |
24+ |
NA/ |
20 |
优势代理渠道,原装正品,可全系列订货开增值税票 |
|||
CYPRESS/赛普拉斯 |
25+ |
BGA-165 |
996880 |
只做原装,欢迎来电资询 |
|||
CYPRESS |
0613+ |
BGA-165 |
138 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
|||
CYPRESS |
24+ |
165FBGA |
4568 |
全新原厂原装，进口正品现货，正规渠道可含税！！ |
|||
CYPRESS/赛普拉斯 |
23+ |
BGA-165 |
98900 |
原厂原装正品现货!! |
|||
CYPRESS |
25+ |
N/A |
100 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
|||
CYPRESS |
2138+ |
BGA |
8960 |
专营BGA,QFP原装现货,假一赔十 |
|||
CYPRESS |
22+ |
BGA |
8000 |
原装正品支持实单 |
|||
Cypress |
24+ |
BGA |
3500 |
原装现货,可开13%税票 |
|||
cypress |
25+ |
10 |
公司优势库存 热卖中! |
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- CY7C1320KV18-250BZI
- CY7C1320KV18-250BZC
- CY7C1320CV18-250BZXC
- CY7C1320CV18-250BZC
- CY7C132
- CY7C131E-55JXI
- CY7C131E-55JXCT
- CY7C131E-55JXC
- CY7C131E-25NXC
- CY7C131E-25JXC
- CY7C131E-15NXI
- CY7C1319KV18-250BZXC
- CY7C1318KV18-300BZXC
- CY7C1318KV18-250BZXI
- CY7C1318KV18-250BZXC
- CY7C1318KV18-250BZC
- CY7C1315KV18-333BZC
- CY7C1315KV18-250BZXI
- CY7C1315KV18-250BZXC
- CY7C1315KV18-250BZI
- CY7C1315KV18-250BZC
- CY7C1314KV18-250BZXI
- CY7C1314KV18-250BZXC
- CY7C1314KV18-250BZI
- CY7C1314KV18-250BZC
- CY7C131
- CY7C130
- CY7C129
- CY7C109
- CY7C107
- CY7C057
- CY7C038
- CY7C037
- CY7C028
- CY7C027
- CY7C025
- CY7C024
- CY7C019
- CY7C018
- CY7C016
- CY7C009
- CY7C008
- CY7C006
- CY7BP
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