8-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

Function, Pinout, and Drive Compatible With FCT and F Logic Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics Ioff Supports Partial-Power-Down Mode Operation Matched Rise and Fall Times Fully

具有三态输出的八路总线寄存收发器

The \\x92FCT646T devices consist of a bus transceiver circuit with 3-state, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers as the appropriate clock • Function, Pinout, and Drive Compatible With FCT and F Logic\n• Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics\n• Matched Rise and Fall Times\n• ESD Protection Exceeds JESD 22 \n• 200-V Machine Model (A115-A)\n• Independent Register for A and B Buses\n• 48-mA Output Si;

8-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

文件：725.1 Kbytes Page：15 Pages

8-Bit Registered Transceiver

文件：76.35 Kbytes Page：8 Pages

8-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

Function, Pinout, and Drive Compatible With FCT and F Logic Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics Ioff Supports Partial-Power-Down Mode Operation Matched Rise and Fall Times Fully

8-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

文件：725.1 Kbytes Page：15 Pages

8-Bit Registered Transceiver

文件：76.35 Kbytes Page：8 Pages

8-Bit Registered Transceiver

文件：76.35 Kbytes Page：8 Pages

8-Bit Registered Transceiver

文件：76.35 Kbytes Page：8 Pages

8-Bit Registered Transceiver

文件：76.35 Kbytes Page：8 Pages