8-BIT REGISTERED TRANSCEIVER

Function, Pinout, and Drive Compatible With FCT, F Logic, and AM2952 Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V

具有三态输出的八路寄存收发器

The CY29FCT52T has two 8-bit back-to-back registers that store data flowing in both directions between two bidirectional buses. Separate clock, clock enable, and 3-state output-enable signals are provided for each register. Both A outputs and B outputs are specified to sink 64 mA. This device is ful • Function, Pinout, and Drive Compatible With FCT, F Logic, and AM2952\n• Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics\n• 200-V Machine Model (A115-A)\n• Ioff Supports Partial-Power-Down Mode Operation\n• Fully Compatible With TTL Input and Output Logic Levels\n• 64-m;

8-Bit Registered Transceiver

文件：264.18 Kbytes Page：10 Pages

8-Bit Registered Transceiver

文件：264.18 Kbytes Page：10 Pages

8-Bit Registered Transceiver

文件：264.18 Kbytes Page：10 Pages

8-Bit Registered Transceiver

文件：264.18 Kbytes Page：10 Pages

8-Bit Registered Transceiver

文件：264.18 Kbytes Page：10 Pages

8-Bit Registered Transceiver

文件：264.18 Kbytes Page：10 Pages