ESD Protective chip

文件：110.14 Kbytes Page：4 Pages

包装：散装 描述：(SOC) CH412, SOC, 3\ 工具 配件

锁存型霍尔开关

ESD保护芯片

丝印代码：C074W；Low Capactiance 4-Line TVS Array

Features # Ultra low capacitance: 0.3pF typical (IO to I/O) # Ultra low leakage: nA level Low operating voltage: 5V. # Low clamping voltage # Upto 4 data ines and one power line protects # Complies with following standards: ~ IEC 610004-2 (ESD) immunity test Ai discharge: 425k Contact dis

丝印代码：E61；4-Line TVS Array

Features # Ultra low leakage: nA level # Low operating voltage: 5V # Low clamping voltage # Complies with following standards: ~ IEC 61000-4-2 (ESD) immunity test Air discharge: +30kV/ Contact discharge: +30kV ~IEC61000-4-5 (Lightning) 10A (8/20 1s) —IEC61000-4-4 (EFT) 40A (5/50ns)

丝印代码：WE；Low Capacitance Q uad Array for ESD Protection

Features Ultra low leakage: nA level Operating voltage: 5V Low clamping voltage Complies with following standards: – IEC 61000-4-2 (ESD) immunity test Air discharge: ±30kV Contact discharge: ±25kV – IEC61000-4-5 (Lightning) 6A (8/20μs) RoHS Compliant Applications Computers Printers

ESD Protective chip

文件：110.14 Kbytes Page：4 Pages

锁存型霍尔开关

ESD Protective chip

文件：110.14 Kbytes Page：4 Pages

Dual Wideband Video Op Amp

文件：1.39832 Mbytes Page：12 Pages

Dual Wideband Video Op Amp

文件：1.39832 Mbytes Page：12 Pages

Dual Wideband Video Op Amp

文件：1.39832 Mbytes Page：12 Pages

Dual Wideband Video Op Amp

文件：1.39832 Mbytes Page：12 Pages

Low Offset, Low Drift Dual JFET Input Operational Amplifier

文件：565.24 Kbytes Page：13 Pages