3.3-V CLOCK PHASE-LOCKED LOOP CLOCK DRIVER

1FEATURES · Qualified for Automotive Applications · Phase-Locked Loop Clock Driver for Synchronous DRAM and General-Purpose Applications · Spread-Spectrum Clock Compatible · Operating Frequency: 24 MHz to 200 MHz · Low Jitter (Cycle-to-Cycle):

CDCVF2505 3.3-V Clock Phase-Lock Loop Clock Driver

1 Features 1• Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications • Spread Spectrum Clock Compatible • Operating Frequency: 24 MHz to 200 MHz • Low Jitter (Cycle-to-Cycle):

用于同步 DRAM和通用应用且具有展频功能、断电模式的 PLL 时钟驱动器

The CDCVF2505 is a high-performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver. This device uses a PLL to precisely align the output clocks (1Y[0-3] and CLKOUT) to the input clock signal (CLKIN) in both frequency and phase. The CDCVF2505 operates at 3.3 V and also provides integrated • Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications\n• Spread Spectrum Clock Compatible\n• Operating Frequency: 24 MHz to 200 MHz\n• Low Jitter (Cycle-to-Cycle):;

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：207.51 Kbytes Page：10 Pages

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：369.62 Kbytes Page：14 Pages

3.3-V Clock Phase-Lock Loop Clock Driver

文件：1.19077 Mbytes Page：23 Pages

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：549.51 Kbytes Page：14 Pages

丝印代码：CKV05；CDCVF2505 3.3-V Clock Phase-Lock Loop Clock Driver

1 Features 1• Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications • Spread Spectrum Clock Compatible • Operating Frequency: 24 MHz to 200 MHz • Low Jitter (Cycle-to-Cycle):

丝印代码：CKV05；CDCVF2505 3.3-V Clock Phase-Lock Loop Clock Driver

1 Features 1• Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications • Spread Spectrum Clock Compatible • Operating Frequency: 24 MHz to 200 MHz • Low Jitter (Cycle-to-Cycle):

丝印代码：CKV05；CDCVF2505 3.3-V Clock Phase-Lock Loop Clock Driver

1 Features 1• Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications • Spread Spectrum Clock Compatible • Operating Frequency: 24 MHz to 200 MHz • Low Jitter (Cycle-to-Cycle):

丝印代码：CKV05；CDCVF2505 3.3-V Clock Phase-Lock Loop Clock Driver

1 Features 1• Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications • Spread Spectrum Clock Compatible • Operating Frequency: 24 MHz to 200 MHz • Low Jitter (Cycle-to-Cycle):

丝印代码：CKV05；CDCVF2505 3.3-V Clock Phase-Lock Loop Clock Driver

1 Features 1• Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications • Spread Spectrum Clock Compatible • Operating Frequency: 24 MHz to 200 MHz • Low Jitter (Cycle-to-Cycle):

丝印代码：CKV05；CDCVF2505 3.3-V Clock Phase-Lock Loop Clock Driver

1 Features 1• Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications • Spread Spectrum Clock Compatible • Operating Frequency: 24 MHz to 200 MHz • Low Jitter (Cycle-to-Cycle):

丝印代码：CKV05Q；3.3-V CLOCK PHASE-LOCKED LOOP CLOCK DRIVER

1FEATURES · Qualified for Automotive Applications · Phase-Locked Loop Clock Driver for Synchronous DRAM and General-Purpose Applications · Spread-Spectrum Clock Compatible · Operating Frequency: 24 MHz to 200 MHz · Low Jitter (Cycle-to-Cycle):

丝印代码：CKV05Q；3.3-V CLOCK PHASE-LOCKED LOOP CLOCK DRIVER

1FEATURES · Qualified for Automotive Applications · Phase-Locked Loop Clock Driver for Synchronous DRAM and General-Purpose Applications · Spread-Spectrum Clock Compatible · Operating Frequency: 24 MHz to 200 MHz · Low Jitter (Cycle-to-Cycle):

丝印代码：CKV05；CDCVF2505 3.3-V Clock Phase-Lock Loop Clock Driver

1 Features 1• Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications • Spread Spectrum Clock Compatible • Operating Frequency: 24 MHz to 200 MHz • Low Jitter (Cycle-to-Cycle):

丝印代码：CKV05；CDCVF2505 3.3-V Clock Phase-Lock Loop Clock Driver

1 Features 1• Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications • Spread Spectrum Clock Compatible • Operating Frequency: 24 MHz to 200 MHz • Low Jitter (Cycle-to-Cycle):

丝印代码：CKV05；CDCVF2505 3.3-V Clock Phase-Lock Loop Clock Driver

1 Features 1• Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications • Spread Spectrum Clock Compatible • Operating Frequency: 24 MHz to 200 MHz • Low Jitter (Cycle-to-Cycle):

丝印代码：CKV05；CDCVF2505 3.3-V Clock Phase-Lock Loop Clock Driver

1 Features 1• Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications • Spread Spectrum Clock Compatible • Operating Frequency: 24 MHz to 200 MHz • Low Jitter (Cycle-to-Cycle):

丝印代码：CKV05；CDCVF2505 3.3-V Clock Phase-Lock Loop Clock Driver

1 Features 1• Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications • Spread Spectrum Clock Compatible • Operating Frequency: 24 MHz to 200 MHz • Low Jitter (Cycle-to-Cycle):

CDCVF2505 3.3-V Clock Phase-Lock Loop Clock Driver

1 Features 1• Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications • Spread Spectrum Clock Compatible • Operating Frequency: 24 MHz to 200 MHz • Low Jitter (Cycle-to-Cycle):

3.3-V CLOCK PHASE-LOCKED LOOP CLOCK DRIVER

1FEATURES · Qualified for Automotive Applications · Phase-Locked Loop Clock Driver for Synchronous DRAM and General-Purpose Applications · Spread-Spectrum Clock Compatible · Operating Frequency: 24 MHz to 200 MHz · Low Jitter (Cycle-to-Cycle):

适用于兼容扩展频谱的同步、DRAM 和通用应用的汽车 PLL 时钟驱动器

The CDCVF2505 is a high-performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver. It uses a PLL to precisely align, in both frequency and phase, the output clocks (1Y[0–3] and CLKOUT) to the input clock signal (CLKIN). The CDCVF2505 operates at 3.3 V. It also provides integrated series- • Qualified for Automotive Applications\n• Phase-Locked Loop Clock Driver for Synchronous DRAM and General-Purpose Applications\n• Spread-Spectrum Clock Compatible\n• Operating Frequency: 24 MHz to 200 MHz\n• Low Jitter (Cycle-to-Cycle): Range 66 MHz to 200 MHz\n• Distributes One Clock Input to One ;

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：369.62 Kbytes Page：14 Pages

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：549.51 Kbytes Page：14 Pages

3.3-V Clock Phase-Lock Loop Clock Driver

文件：1.19077 Mbytes Page：23 Pages

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：549.51 Kbytes Page：14 Pages

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：369.62 Kbytes Page：14 Pages

3.3-V Clock Phase-Lock Loop Clock Driver

文件：1.19077 Mbytes Page：23 Pages

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC 3.3V PLL CLOCK DRVR 8-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：369.62 Kbytes Page：14 Pages

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：549.51 Kbytes Page：14 Pages

3.3-V Clock Phase-Lock Loop Clock Driver

文件：1.19077 Mbytes Page：23 Pages

3.3-V Clock Phase-Lock Loop Clock Driver

文件：1.19077 Mbytes Page：23 Pages

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：549.51 Kbytes Page：14 Pages

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：369.62 Kbytes Page：14 Pages

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC 3.3V PLL CLOCK DRVR 8-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：369.62 Kbytes Page：14 Pages

3.3-V Clock Phase-Lock Loop Clock Driver

文件：1.19077 Mbytes Page：23 Pages

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：549.51 Kbytes Page：14 Pages

3.3-V CLOCK PHASE-LOCKED LOOP CLOCK DRIVER

文件：225.62 Kbytes Page：10 Pages

3.3-V Clock Phase-Lock Loop Clock Driver

文件：1.19077 Mbytes Page：23 Pages

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：549.51 Kbytes Page：14 Pages

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：369.62 Kbytes Page：14 Pages

3.3-V Clock Phase-Lock Loop Clock Driver

文件：1.19077 Mbytes Page：23 Pages

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：549.51 Kbytes Page：14 Pages

3.3-V Clock Phase-Lock Loop Clock Driver

文件：1.19077 Mbytes Page：23 Pages

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：369.62 Kbytes Page：14 Pages

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：369.62 Kbytes Page：14 Pages

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：549.51 Kbytes Page：14 Pages

3.3-V Clock Phase-Lock Loop Clock Driver

文件：1.19077 Mbytes Page：23 Pages

3.3-V CLOCK PHASE-LOCKED LOOP CLOCK DRIVER

文件：225.62 Kbytes Page：10 Pages

Silicon NPN Transistor Low Frequency, General Purpose Amp

Features: ● High Current Capacity ● High DC Current Gain ● Low Collector Emitter Saturation Voltage ● High Emitter Base Breakdown Voltage Absolute Maximum Ratings: (TA = +25°C unless otherwise specified) Collector–Base Voltage, VCBO . . . . . . . . . . . . . . . . .. . . . . .

HIGH ISOLATION VOLTAGE AC INPUT RESPONSE TYPE MULTI PHOTOCOUPLER SERIES

SEMICONDUCTOR SELECTION GUIDE Microcomputer IC Memory Semi-Custom IC Particular Purpose IC General Purpose Linear IC Transistor / Diode / Thyristor Microwave Device / Consumer Use High Frequency Device Optical Device Packages Index (Quick Reference by Type N

HIGH ISOLATION VOLTAGE AC INPUT RESPONSE TYPE MULTI PHOTOCOUPLER SERIES

SEMICONDUCTOR SELECTION GUIDE Microcomputer IC Memory Semi-Custom IC Particular Purpose IC General Purpose Linear IC Transistor / Diode / Thyristor Microwave Device / Consumer Use High Frequency Device Optical Device Packages Index (Quick Reference by Type N

Digital multi-channel audio IC DUET

GENERAL The SAA2505H decodes multi-channel audio up to MPEG 7.1, AC-3 5.1 and pro-logic on a dual DSP core. FEATURES Hardware features • Two 40 MIPS 20-bit DSP cores • All input and output buffer RAM is on-chip • Program ROM on-chip for all decoding modes • Two I2S-bus inputs with normal, d

Digital multi-channel audio IC DUET

GENERAL The SAA2505H decodes multi-channel audio up to MPEG 7.1, AC-3 5.1 and pro-logic on a dual DSP core. FEATURES Hardware features • Two 40 MIPS 20-bit DSP cores • All input and output buffer RAM is on-chip • Program ROM on-chip for all decoding modes • Two I2S-bus inputs with normal, d