1:3 LVPECL 时钟缓冲器 + LVCMOS 输出 + 可编程分频器

The CDCM1804 clock driver distributes one pair of differential clock inputs to three pairs of LVPECL differential clock outputs Y[2:0] and Y[2:0], with minimum skew for clock distribution. The CDCM1804 is specifically designed for driving 50- transmission lines. Additionally, the CDCM1804 offers a s • Distributes One Differential Clock Input to Three LVPECL Differential Clock Outputs and One LVCMOS Single-Ended Output\n• Programmable Output Divider for Two LVPECL Outputs and LVCMOS Output\n• Low-Output Skew 15 ps (Typical) for Clock-Distribution Applications for LVPECL Outputs; 1.6-ns Output Sk;

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：589.11 Kbytes Page：24 Pages

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：623.31 Kbytes Page：27 Pages

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：623.31 Kbytes Page：27 Pages

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：589.11 Kbytes Page：24 Pages

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：623.31 Kbytes Page：27 Pages

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：623.31 Kbytes Page：27 Pages

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：589.11 Kbytes Page：24 Pages

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：589.11 Kbytes Page：24 Pages

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：623.31 Kbytes Page：27 Pages

封装/外壳：24-VFQFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC CLK BUFFER 1:4 800MHZ 24QFN 集成电路（IC） 时钟缓冲器，驱动器

封装/外壳：24-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC CLK BUFFER 1:4 800MHZ 24QFN 集成电路（IC） 时钟缓冲器，驱动器

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：589.11 Kbytes Page：24 Pages

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：623.31 Kbytes Page：27 Pages

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：589.11 Kbytes Page：24 Pages

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：589.11 Kbytes Page：24 Pages

1.8 GHz LOW NOISE AMPLIFIER AND DOWNMIXER GaAs MONOLITHIC INTEGRATED CIRCUIT

Designed primarily for use in DECT, Japan Personal Handy Phone (JPHP), and other wireless Personal Communication Systems (PCS) applications. The MRFIC1804 includes a low noise amplifier and downmixer in a low-cost SOIC-16 package. The integrated circuit requires minimal off-chip matching while all

Integrated Circuit Vertical Deflection Circuit for Large Screen TV

Description: The NTE1804 is an integrated circuit in a 13–Lead SIP type package designed for vertical deflection in video monitors and large screen color television receivers, e.g. 30AX and PIL–S4 systems. Features: Oscillator; Switch Capability for 50Hz/60Hz Operation Synchronizatio

N-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING

DESCRIPTION The µPA1804 is a switching device which can be driven directly by a 4.5 V power source. The µPA1804 features a low on-state resistance and excellent switching characteristics, and is suitable for applications such as power switch of portable machine and so on. FEATURES • Can be dri

Low-Power BiCMOS Current-Mode PWM

文件：383.98 Kbytes Page：20 Pages

Low-Power BiCMOS Current-Mode PWM

文件：383.98 Kbytes Page：20 Pages