丝印代码：CDCLVP110；Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver

1FEATURES • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock Outputs • Fully Compatible With LVECL/LVPECL/HSTL • Single Supply Voltage Required, ±3.3-V or ±2.5-V Supply • Selectable Clock Input Through CLK_SEL • Low-Output Skew (Typ 15 ps) for Cloc

丝印代码：CDCLVP110；Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver

1FEATURES • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock Outputs • Fully Compatible With LVECL/LVPECL/HSTL • Single Supply Voltage Required, ±3.3-V or ±2.5-V Supply • Selectable Clock Input Through CLK_SEL • Low-Output Skew (Typ 15 ps) for Cloc

丝印代码：CDCLVP110；Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver

1FEATURES • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock Outputs • Fully Compatible With LVECL/LVPECL/HSTL • Single Supply Voltage Required, ±3.3-V or ±2.5-V Supply • Selectable Clock Input Through CLK_SEL • Low-Output Skew (Typ 15 ps) for Cloc

丝印代码：CDCLVP110；Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver

1FEATURES • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock Outputs • Fully Compatible With LVECL/LVPECL/HSTL • Single Supply Voltage Required, ±3.3-V or ±2.5-V Supply • Selectable Clock Input Through CLK_SEL • Low-Output Skew (Typ 15 ps) for Cloc

丝印代码：CDCLVP110；Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver

1FEATURES • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock Outputs • Fully Compatible With LVECL/LVPECL/HSTL • Single Supply Voltage Required, ±3.3-V or ±2.5-V Supply • Selectable Clock Input Through CLK_SEL • Low-Output Skew (Typ 15 ps) for Cloc

丝印代码：CDCLVP110；Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver

1FEATURES • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock Outputs • Fully Compatible With LVECL/LVPECL/HSTL • Single Supply Voltage Required, ±3.3-V or ±2.5-V Supply • Selectable Clock Input Through CLK_SEL • Low-Output Skew (Typ 15 ps) for Cloc

丝印代码：CDCLVP110；Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver

1FEATURES • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock Outputs • Fully Compatible With LVECL/LVPECL/HSTL • Single Supply Voltage Required, ±3.3-V or ±2.5-V Supply • Selectable Clock Input Through CLK_SEL • Low-Output Skew (Typ 15 ps) for Cloc

Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver

1FEATURES • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock Outputs • Fully Compatible With LVECL/LVPECL/HSTL • Single Supply Voltage Required, ±3.3-V or ±2.5-V Supply • Selectable Clock Input Through CLK_SEL • Low-Output Skew (Typ 15 ps) for Cloc

1:10 LVPECL/HSTL 至 LVPECL 时钟驱动器

The CDCLVP110 clock driver distributes one differential clock pair of either LVPECL or HSTL (selectable) input, (CLK0, CLK1) to ten pairs of differential LVPECL clock (Q0, Q9) outputs with minimum skew for clock distribution. The CDCLVP110 can accept two clock sources into an input multiplexer. The • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock Outputs\n• Fully Compatible With LVECL/LVPECL/HSTL\n• Single Supply Voltage Required, ±3.3-V or ±2.5-V Supply\n• Selectable Clock Input Through CLK_SEL\n• Low-Output Skew (Typ 15 ps) for Clock-Distribution Ap;

LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER

文件：136.54 Kbytes Page：11 Pages

Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver

文件：675.29 Kbytes Page：14 Pages

CDCLVP1102 Two-LVPECL Output, High-Performance Clock Buffer

1 Features 1• 1:2 Differential Buffer • Single Clock Input • Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL • Two LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 33 mA • Very Low Additive Jitter:

低抖动 1:2 通用至 LVPECL 缓冲器

The CDCLVP1102 is a highly versatile, low additive jitter buffer that can generate two copies of LVPECL clock outputs from one LVPECL, LVDS, or LVCMOS input for a variety of communication applications. It has a maximum clock frequency up to 2 GHz. The overall additive jitter performance is less than • 1:2 Differential Buffer\n• Single Clock Input\n• Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL\n• Two LVPECL Outputs\n• Maximum Clock Frequency: 2 GHz\n• Maximum Core Current Consumption: 33 mA\n• Very Low Additive Jitter: to 20-MHz Offset Range\n• 2.375-V to 3.6-V Device Power Supply\n• ;

CDCLVP1102 Two-LVPECL Output, High-Performance Clock Buffer

1 Features 1• 1:2 Differential Buffer • Single Clock Input • Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL • Two LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 33 mA • Very Low Additive Jitter:

CDCLVP1102 Two-LVPECL Output, High-Performance Clock Buffer

1 Features 1• 1:2 Differential Buffer • Single Clock Input • Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL • Two LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 33 mA • Very Low Additive Jitter:

丝印代码：1102；CDCLVP1102 Two-LVPECL Output, High-Performance Clock Buffer

1 Features 1• 1:2 Differential Buffer • Single Clock Input • Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL • Two LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 33 mA • Very Low Additive Jitter:

丝印代码：1102；CDCLVP1102 Two-LVPECL Output, High-Performance Clock Buffer

1 Features 1• 1:2 Differential Buffer • Single Clock Input • Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL • Two LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 33 mA • Very Low Additive Jitter:

丝印代码：1102；CDCLVP1102 Two-LVPECL Output, High-Performance Clock Buffer

1 Features 1• 1:2 Differential Buffer • Single Clock Input • Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL • Two LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 33 mA • Very Low Additive Jitter:

丝印代码：1102；CDCLVP1102 Two-LVPECL Output, High-Performance Clock Buffer

1 Features 1• 1:2 Differential Buffer • Single Clock Input • Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL • Two LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 33 mA • Very Low Additive Jitter:

丝印代码：1102；CDCLVP1102 Two-LVPECL Output, High-Performance Clock Buffer

1 Features 1• 1:2 Differential Buffer • Single Clock Input • Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL • Two LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 33 mA • Very Low Additive Jitter:

丝印代码：1102；CDCLVP1102 Two-LVPECL Output, High-Performance Clock Buffer

1 Features 1• 1:2 Differential Buffer • Single Clock Input • Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL • Two LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 33 mA • Very Low Additive Jitter:

丝印代码：1102；CDCLVP1102 Two-LVPECL Output, High-Performance Clock Buffer

1 Features 1• 1:2 Differential Buffer • Single Clock Input • Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL • Two LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 33 mA • Very Low Additive Jitter:

丝印代码：1102；CDCLVP1102 Two-LVPECL Output, High-Performance Clock Buffer

1 Features 1• 1:2 Differential Buffer • Single Clock Input • Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL • Two LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 33 mA • Very Low Additive Jitter:

丝印代码：1102；CDCLVP1102 Two-LVPECL Output, High-Performance Clock Buffer

1 Features 1• 1:2 Differential Buffer • Single Clock Input • Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL • Two LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 33 mA • Very Low Additive Jitter:

丝印代码：1102；CDCLVP1102 Two-LVPECL Output, High-Performance Clock Buffer

1 Features 1• 1:2 Differential Buffer • Single Clock Input • Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL • Two LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 33 mA • Very Low Additive Jitter:

丝印代码：1102；CDCLVP1102 Two-LVPECL Output, High-Performance Clock Buffer

1 Features 1• 1:2 Differential Buffer • Single Clock Input • Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL • Two LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 33 mA • Very Low Additive Jitter:

Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver

文件：675.29 Kbytes Page：14 Pages

Two LVPECL Output, High-Performance Clock Buffer

文件：753.48 Kbytes Page：22 Pages

Two LVPECL Output, High-Performance Clock Buffer

文件：753.48 Kbytes Page：22 Pages

Two LVPECL Output, High-Performance Clock Buffer

文件：753.48 Kbytes Page：22 Pages

封装/外壳：16-VFQFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC CLK BUFFER 1:2 2GHZ 16QFN 集成电路（IC） 时钟缓冲器，驱动器

封装/外壳：16-VFQFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC CLK BUFFER 1:2 2GHZ 16QFN 集成电路（IC） 时钟缓冲器，驱动器

Two LVPECL Output, High-Performance Clock Buffer

文件：753.48 Kbytes Page：22 Pages

Two LVPECL Output, High-Performance Clock Buffer

文件：753.48 Kbytes Page：22 Pages

LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER

文件：136.54 Kbytes Page：11 Pages

Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver

文件：675.29 Kbytes Page：14 Pages

Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver

文件：675.29 Kbytes Page：14 Pages

Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver

文件：675.29 Kbytes Page：14 Pages

LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER

文件：136.54 Kbytes Page：11 Pages

Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver

文件：675.29 Kbytes Page：14 Pages

LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER

文件：136.54 Kbytes Page：11 Pages

Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver

文件：675.29 Kbytes Page：14 Pages

Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver

文件：675.29 Kbytes Page：14 Pages

POWER RECTIFIERS(1.0A,500-1000V)

POWER RECTIFIERS(1.0A,500-1000V)

SCHOTTKY BARRIER RECTIFIERS(1.0A,70-100V)

Surface Mount Schottky Barrier Rectifiers SCHOTTKY BARRIER RECTIFIERS 1.0 AMPERES 70 -100 VOLTS

SCHOTTKY BARRIER RECTIFIERS(1.0A,70-100V)

POWER RECTIFIERS(1.0A,500-1000V)

ULTRAFAST POWER RECTIFIERS 1.0 AMPERES 500 -- 1000 VOLTS