丝印代码：CDC536；3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS

FEATURES · Low-Output Skew for Clock-Distribution and Clock-Generation Applications · Operates at 3.3-V VCC · Distributes One Clock Input to Six Outputs · One Select Input Configures Three Outputs to Operate at One-Half or Double the Input Frequency · No External RC Network Required · Ext

封装/外壳：28-SSOP（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC 3.3V PLL CLOCK DRIVER 28-SSOP 集成电路（IC） 时钟发生器，PLL，频率合成器

3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS

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