High-Speed CMOS Logic Quad 2-Input Multiplexer with Three-State Non-Inverting Outputs

Features • Buffered Inputs • Typical Propagation Delay ( In to Output ) = 12ns at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating T

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC MULTIPLEXER 4 X 2:1 16SOIC 集成电路（IC） 信号开关，多路复用器，解码器

High-Speed CMOS Logic Quad 2-Input Multiplexer with Three-State Non-Inverting Outputs

文件：462.6 Kbytes Page：15 Pages

High-Speed CMOS Logic Quad 2-Input Multiplexer with Three-State Non-Inverting Outputs

文件：276.13 Kbytes Page：12 Pages

High-Speed CMOS Logic Quad 2-Input Multiplexer with Three-State Non-Inverting Outputs

文件：276.13 Kbytes Page：12 Pages

Quad 2-input multiplexer; 3-state

QUAD 2-CHANEL MULTIPLEXER (3-STATE)

Quad. 2-to-1-line Data Selectors/Multiplexers(with noninverted 3-state outputs)

Description The large output drive capability coupled with the 3-state feature make this device ideal for interfacing with bus lines in a bus organized system. When the output control input line is taken high, the outputs of all four multiplexers are sent into a high impedance state. When the out

Quad 2-input multiplexer 3-state

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High Speed CMOS Logic Quad 2-Input Multiplexer with Three-State Non-Inverting Outputs

文件：52.16 Kbytes Page：7 Pages