CDx4ACT174 Hex D-Type Flip-Flops with Clear

1 Features • Inputs are TTL-voltage compatible • Contain six flip-flops with single-rail outputs • Buffered inputs • Speed of bipolar F, AS, and S, with significantly reduced power consumption • Balanced propagation delays • ±24mA output drive current – Fanout to 15 F devices • SCR-latchu

CDx4ACT174 Hex D-Type Flip-Flops with Clear

1 Features • Inputs are TTL-voltage compatible • Contain six flip-flops with single-rail outputs • Buffered inputs • Speed of bipolar F, AS, and S, with significantly reduced power consumption • Balanced propagation delays • ±24mA output drive current – Fanout to 15 F devices • SCR-latchu

具有复位功能的六路 D 型触发器

The ’ACT174 devices are positive-edge-triggered D-type flip-flops with a direct clear (CLR)\\ input and are designed for 4.5-V to 5.5-V VCC operation.\n\n Information at the data (D) inputs that meets the setup time requirements is transferred to the outputs on the positive-going edge of the clock ( • Inputs Are TTL-Voltage Compatible\n• Contain Six Flip-Flops With Single-Rail Outputs\n• Buffered Inputs\n• Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption\n• Balanced Propagation Delays\n• ±24-mA Output Drive Current \n• Fanout to 15 F Devices\n \n• SCR-Latchup-Resistan;

Hex D Flip-Flop with Reset

文件：36.39 Kbytes Page：7 Pages

HEX D-TYPE FLIP-FLOPS WITH CLEAR

文件：316.36 Kbytes Page：10 Pages

丝印代码：CD74ACT174E；CDx4ACT174 Hex D-Type Flip-Flops with Clear

1 Features • Inputs are TTL-voltage compatible • Contain six flip-flops with single-rail outputs • Buffered inputs • Speed of bipolar F, AS, and S, with significantly reduced power consumption • Balanced propagation delays • ±24mA output drive current – Fanout to 15 F devices • SCR-latchu

丝印代码：CD74ACT174E；CDx4ACT174 Hex D-Type Flip-Flops with Clear

1 Features • Inputs are TTL-voltage compatible • Contain six flip-flops with single-rail outputs • Buffered inputs • Speed of bipolar F, AS, and S, with significantly reduced power consumption • Balanced propagation delays • ±24mA output drive current – Fanout to 15 F devices • SCR-latchu

丝印代码：AD174；CDx4ACT174 Hex D-Type Flip-Flops with Clear

1 Features • Inputs are TTL-voltage compatible • Contain six flip-flops with single-rail outputs • Buffered inputs • Speed of bipolar F, AS, and S, with significantly reduced power consumption • Balanced propagation delays • ±24mA output drive current – Fanout to 15 F devices • SCR-latchu

丝印代码：AD174；CDx4ACT174 Hex D-Type Flip-Flops with Clear

1 Features • Inputs are TTL-voltage compatible • Contain six flip-flops with single-rail outputs • Buffered inputs • Speed of bipolar F, AS, and S, with significantly reduced power consumption • Balanced propagation delays • ±24mA output drive current – Fanout to 15 F devices • SCR-latchu

丝印代码：ACT174M；CDx4ACT174 Hex D-Type Flip-Flops with Clear

1 Features • Inputs are TTL-voltage compatible • Contain six flip-flops with single-rail outputs • Buffered inputs • Speed of bipolar F, AS, and S, with significantly reduced power consumption • Balanced propagation delays • ±24mA output drive current – Fanout to 15 F devices • SCR-latchu

丝印代码：ACT174M；CDx4ACT174 Hex D-Type Flip-Flops with Clear

1 Features • Inputs are TTL-voltage compatible • Contain six flip-flops with single-rail outputs • Buffered inputs • Speed of bipolar F, AS, and S, with significantly reduced power consumption • Balanced propagation delays • ±24mA output drive current – Fanout to 15 F devices • SCR-latchu

丝印代码：ACT174M；CDx4ACT174 Hex D-Type Flip-Flops with Clear

1 Features • Inputs are TTL-voltage compatible • Contain six flip-flops with single-rail outputs • Buffered inputs • Speed of bipolar F, AS, and S, with significantly reduced power consumption • Balanced propagation delays • ±24mA output drive current – Fanout to 15 F devices • SCR-latchu

丝印代码：ACT174M；CDx4ACT174 Hex D-Type Flip-Flops with Clear

1 Features • Inputs are TTL-voltage compatible • Contain six flip-flops with single-rail outputs • Buffered inputs • Speed of bipolar F, AS, and S, with significantly reduced power consumption • Balanced propagation delays • ±24mA output drive current – Fanout to 15 F devices • SCR-latchu

丝印代码：ACT174M；CDx4ACT174 Hex D-Type Flip-Flops with Clear

1 Features • Inputs are TTL-voltage compatible • Contain six flip-flops with single-rail outputs • Buffered inputs • Speed of bipolar F, AS, and S, with significantly reduced power consumption • Balanced propagation delays • ±24mA output drive current – Fanout to 15 F devices • SCR-latchu

丝印代码：ACT174M；CDx4ACT174 Hex D-Type Flip-Flops with Clear

1 Features • Inputs are TTL-voltage compatible • Contain six flip-flops with single-rail outputs • Buffered inputs • Speed of bipolar F, AS, and S, with significantly reduced power consumption • Balanced propagation delays • ±24mA output drive current – Fanout to 15 F devices • SCR-latchu

丝印代码：AD174；CDx4ACT174 Hex D-Type Flip-Flops with Clear

1 Features • Inputs are TTL-voltage compatible • Contain six flip-flops with single-rail outputs • Buffered inputs • Speed of bipolar F, AS, and S, with significantly reduced power consumption • Balanced propagation delays • ±24mA output drive current – Fanout to 15 F devices • SCR-latchu

HEX D-TYPE FLIP-FLOPS WITH CLEAR

文件：883.67 Kbytes Page：14 Pages

Hex D Flip-Flop with Reset

文件：36.39 Kbytes Page：7 Pages

HEX D-TYPE FLIP-FLOPS WITH CLEAR

文件：316.36 Kbytes Page：10 Pages

HEX D-TYPE FLIP-FLOPS WITH CLEAR

文件：316.36 Kbytes Page：10 Pages

HEX D-TYPE FLIP-FLOPS WITH CLEAR

文件：883.67 Kbytes Page：14 Pages

Hex D Flip-Flop with Reset

文件：36.39 Kbytes Page：7 Pages

HEX D-TYPE FLIP-FLOPS WITH CLEAR

文件：883.67 Kbytes Page：14 Pages

HEX D-TYPE FLIP-FLOPS WITH CLEAR

文件：316.36 Kbytes Page：10 Pages

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：主复位 包装：管件 描述：IC FF D-TYPE SNGL 6BIT 16SOIC 集成电路（IC） 触发器

HEX D-TYPE FLIP-FLOPS WITH CLEAR

文件：316.36 Kbytes Page：10 Pages

HEX D-TYPE FLIP-FLOPS WITH CLEAR

文件：883.67 Kbytes Page：14 Pages

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：主复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE SNGL 6BIT 16SOIC 集成电路（IC） 触发器

HEX D-TYPE FLIP-FLOPS WITH CLEAR

文件：883.67 Kbytes Page：14 Pages

HEX D-TYPE FLIP-FLOPS WITH CLEAR

文件：316.36 Kbytes Page：10 Pages

HEX D-TYPE FLIP-FLOPS WITH CLEAR

文件：883.67 Kbytes Page：14 Pages

HEX D-TYPE FLIP-FLOPS WITH CLEAR

文件：316.36 Kbytes Page：10 Pages

Hex D Flip?묯lop with Master Reset

The MC74AC174/74ACT174 is a high−speed hex D flip−flop. The device is used primarily as a 6−bit edge−triggered storage register. The information on the D inputs is transferred to storage during the LOW−to−HIGH clock transition. The device has a Master Reset to simultaneously clear all flip−flops.

Hex D Flip?묯lop with Master Reset

The MC74AC174/74ACT174 is a high−speed hex D flip−flop. The device is used primarily as a 6−bit edge−triggered storage register. The information on the D inputs is transferred to storage during the LOW−to−HIGH clock transition. The device has a Master Reset to simultaneously clear all flip−flops.

Hex D Flip?묯lop with Master Reset

The MC74AC174/74ACT174 is a high−speed hex D flip−flop. The device is used primarily as a 6−bit edge−triggered storage register. The information on the D inputs is transferred to storage during the LOW−to−HIGH clock transition. The device has a Master Reset to simultaneously clear all flip−flops.

Hex D Flip?묯lop with Master Reset

The MC74AC174/74ACT174 is a high−speed hex D flip−flop. The device is used primarily as a 6−bit edge−triggered storage register. The information on the D inputs is transferred to storage during the LOW−to−HIGH clock transition. The device has a Master Reset to simultaneously clear all flip−flops.

Hex D Flip?묯lop with Master Reset

The MC74AC174/74ACT174 is a high−speed hex D flip−flop. The device is used primarily as a 6−bit edge−triggered storage register. The information on the D inputs is transferred to storage during the LOW−to−HIGH clock transition. The device has a Master Reset to simultaneously clear all flip−flops.