Octal TRansparent Latch, 3-State

Family Features: Exceeds 2-kV ESD Protection - MIL-STD-883, Method 3015 SCR-Latchup-resistant CMOS process and circuit design Speed of bipolar FAST*/AS]S with significantly reduced power consumption Balanced propagation delays. AC types feature 1.5-V to 5.5-V operation and balanced noise

封装/外壳：20-DIP（0.300"，7.62mm） 包装：管件 描述：IC OCT TRANSP LATCH 20-DIP 集成电路（IC） 锁存器

Octor Transparent Latch, 3-state

文件：979.77 Kbytes Page：16 Pages

Octal transparent Latch, 3-state

文件：1.26782 Mbytes Page：17 Pages

Octor Transparent Latch, 3-state

文件：979.77 Kbytes Page：16 Pages

Octal Latch with 3-STATE Outputs

General Description The 74AC573 and 74ACT573 are high-speed octal latches with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs. The 74AC573 and 74ACT573 are functionally identical to the 74AC373 and 74ACT373 but with inputs and out puts on opposite sides. Feature

OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING

DESCRIPTION The 74AC573 is an advanced high-speed CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. ■ HIGH SPEED: tPD = 4.5ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C

Advanced CMOS

Features:  Outputs Source/Sink 24mA  Low input current: 1μA  3-State outputs  Outputs directly interface CMOS, NMOS and TTL  Operating voltage range: 2.0V to 6.0V  Lower power consumption & higher speed  Function compatible with 74HC573  Full military temperature range.

Octal Latch with 3-STATE Outputs

文件：275.5 Kbytes Page：13 Pages

Advanced CMOS Logic

文件：1.1672 Mbytes Page：7 Pages