9-Bit Odd/Even Parity Generator/Checker

Features • Buffered Inputs • Typical Propagation Delay - 10ns at VCC = 5V, TA = 25oC, CL = 50pF • Exceeds 2kV ESD Protection per MIL-STD-883, Method 3015 • SCR-Latchup-Resistant CMOS Process and Circuit Design • Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption • B

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC PARITY GEN/CHKER 9-BIT 14SOIC 集成电路（IC） 奇偶校验发生器和校验器

9-Bit Odd/Even Parity Generator/Checker

文件：404.95 Kbytes Page：12 Pages

9-Bit Odd/Even Parity Generator/Checker

文件：28.58 Kbytes Page：5 Pages

9-Bit Odd/Even Parity Generator/Checker

文件：260.12 Kbytes Page：2 Pages

9-Bit Odd/Even Parity Generator/Checker

文件：28.58 Kbytes Page：5 Pages

9-Bit Odd/Even Parity Generator/Checker

Features • Buffered Inputs • Typical Propagation Delay - 10ns at VCC = 5V, TA = 25oC, CL = 50pF • Exceeds 2kV ESD Protection per MIL-STD-883, Method 3015 • SCR-Latchup-Resistant CMOS Process and Circuit Design • Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption • B

9-Bit Odd/Even Parity Generator/Checker

Features • Buffered Inputs • Typical Propagation Delay - 10ns at VCC = 5V, TA = 25oC, CL = 50pF • Exceeds 2kV ESD Protection per MIL-STD-883, Method 3015 • SCR-Latchup-Resistant CMOS Process and Circuit Design • Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption • B

9-Bit Odd/Even Parity Generator/Checker

Features • Buffered Inputs • Typical Propagation Delay - 10ns at VCC = 5V, TA = 25oC, CL = 50pF • Exceeds 2kV ESD Protection per MIL-STD-883, Method 3015 • SCR-Latchup-Resistant CMOS Process and Circuit Design • Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption • B

9-Bit Odd/Even Parity Generator/Checker

文件：404.95 Kbytes Page：12 Pages

9-Bit Odd/Even Parity Generator/Checker

文件：260.12 Kbytes Page：2 Pages

9-Bit Odd/Even Parity Generator/Checker

文件：260.12 Kbytes Page：2 Pages

9-Bit Odd/Even Parity Generator/Checker

文件：404.95 Kbytes Page：12 Pages

9-Bit Odd/Even Parity Generator/Checker

文件：404.95 Kbytes Page：12 Pages

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC PARITY GEN/CHKER 9-BIT 14SOIC 集成电路（IC） 奇偶校验发生器和校验器

9-Bit Odd/Even Parity Generator/Checker

文件：404.95 Kbytes Page：12 Pages

9-Bit Odd/Even Parity Generator/Checker

文件：260.12 Kbytes Page：2 Pages

9-Bit Odd/Even Parity Generator/Checker

文件：404.95 Kbytes Page：12 Pages

9-Bit Parity Generator/Checker

General Description The AC280 is a high-speed parity generator/checker that accepts nine bits of input data and detects whether an even or an odd number of these inputs is HIGH. If an even number of inputs is HIGH, the Sum Even output is HIGH. If an odd number is HIGH, the Sum Even output is LOW.

9 BIT PARITY GENERATOR

DESCRIPTION The 74AC280 is an advanced high-speed CMOS 9 BIT PARITY GENERATOR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. ■ HIGH SPEED: tPD = 6ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY:

9 BIT PARITY GENERATOR

DESCRIPTION The 74AC280 is an advanced high-speed CMOS 9 BIT PARITY GENERATOR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. ■ HIGH SPEED: tPD = 6ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY:

9 BIT PARITY GENERATOR

DESCRIPTION The 74AC280 is an advanced high-speed CMOS 9 BIT PARITY GENERATOR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. ■ HIGH SPEED: tPD = 6ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: