Dual J-K Flip-Flop with Reset Negative-Edge Trigger

Features • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times • Asynchronous Reset • Complementary Outputs • Buffered Inputs • Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . .

具有复位功能的高速 CMOS 逻辑双路负边沿触发式 J-K 触发器

The ’HC107 and ’HCT107 utilize silicon gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. They exhibit the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads.\n\n These flip-flops have independent J, K, Reset and Clo • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times\n• Complementary Outputs\n• Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25°C\n• Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads\n• Wide Operating Temperature Range . . . -55°C to 125°;

Dual J-K Flip-Flop with Reset Negative-Edge Trigger

文件：266.26 Kbytes Page：11 Pages

Dual J-K Flip-Flop with Reset Negative-Edge Trigger

文件：451.69 Kbytes Page：15 Pages

Dual J-K Flip-Flop with Reset Negative-Edge Trigger

文件：624.14 Kbytes Page：16 Pages

丝印代码：5962-8515401CA；Dual J-K Flip-Flop with Reset Negative-Edge Trigger

Features • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times • Asynchronous Reset • Complementary Outputs • Buffered Inputs • Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . .

丝印代码：5962-8515401CA；Dual J-K Flip-Flop with Reset Negative-Edge Trigger

Features • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times • Asynchronous Reset • Complementary Outputs • Buffered Inputs • Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . .

Dual J-K Flip-Flop with Reset Negative-Edge Trigger

文件：451.69 Kbytes Page：15 Pages

Dual J-K Flip-Flop with Reset Negative-Edge Trigger

文件：624.14 Kbytes Page：16 Pages

Dual J-K Flip-Flop with Reset Negative-Edge Trigger

文件：451.69 Kbytes Page：15 Pages

Dual J-K Flip-Flop with Reset Negative-Edge Trigger

文件：266.26 Kbytes Page：11 Pages

Dual J-K Flip-Flop with Reset Negative-Edge Trigger

文件：624.14 Kbytes Page：16 Pages

DUAL J-K FLIP FLOP WITH CLEAR

文件：248.85 Kbytes Page：11 Pages

MM54HC107/MM74HC107 Dual J-K Flip-Flops with Clear

文件：130.979 Kbytes Page：6 Pages

MM54HC107/MM74HC107 Dual J-K Flip-Flops with Clear

文件：130.979 Kbytes Page：6 Pages