丝印代码：CM522B；CMOS Programmable BCD Divide-by-“N” Counter

Features: ® Internally synchronous for high inter- nal and external speeds. ® Logic edge-clocked design — incre- ments on positive Clock transition or on negative Clock Inhibit transition. ® 100% tested for quiescent current at 20-V. B® 5-V, 10-V, and 15-V parametric ratings. ® Standar

封装/外壳：16-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC PRG BCD DIV-BY-N CNTR 16TSSOP 集成电路（IC） 计数器，除法器

CMOS Programmable BCD Divide-by-N Counter

文件：527.2 Kbytes Page：15 Pages

丝印代码：CM522B；CMOS Programmable BCD Divide-by-“N” Counter

Features: ® Internally synchronous for high inter- nal and external speeds. ® Logic edge-clocked design — incre- ments on positive Clock transition or on negative Clock Inhibit transition. ® 100% tested for quiescent current at 20-V. B® 5-V, 10-V, and 15-V parametric ratings. ® Standar

CMOS Programmable BCD Divide-by-N Counter

文件：527.2 Kbytes Page：15 Pages

CMOS Programmable BCD Divide-by-N Counter

文件：527.2 Kbytes Page：15 Pages

封装/外壳：16-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC PRG BCD DIV-BY-N CNTR 16TSSOP 集成电路（IC） 计数器，除法器

Silicon Diffused Power Transistor

GENERAL DESCRIPTION Enhanced performance, new generation, high-voltage, high-speed switching npn transistor with an integrated damper diode in a plastic full-pack envelope intended for use in horizontal deflection circuits of colour television receivers and p.c monitors. Features exceptional to

Silicon Diffused Power Transistor

GENERAL DESCRIPTION Enhanced performance, new generation, high-voltage, high-speed switching npn transistor with an integrated damper diode in a plastic full-pack envelope intended for use in horizontal deflection circuits of colour television receivers and p.c monitors. Features exceptional tole

Programmable 4-bit BCD down counter

DESCRIPTION The HEF4522B is a synchronous programmable 4-bit BCD down counter with an active HIGH and an active LOW clock input (CP0, CP1), an asynchronous parallel load input (PL), four parallel inputs (P0 to P3), a cascade feedback input (CF), four buffered parallel outputs (O0 to O3), a termin

Programmable 4-bit BCD down counter

DESCRIPTION The HEF4522B is a synchronous programmable 4-bit BCD down counter with an active HIGH and an active LOW clock input (CP0, CP1), an asynchronous parallel load input (PL), four parallel inputs (P0 to P3), a cascade feedback input (CF), four buffered parallel outputs (O0 to O3), a termin

Programmable 4-bit BCD down counter

DESCRIPTION The HEF4522B is a synchronous programmable 4-bit BCD down counter with an active HIGH and an active LOW clock input (CP0, CP1), an asynchronous parallel load input (PL), four parallel inputs (P0 to P3), a cascade feedback input (CF), four buffered parallel outputs (O0 to O3), a termin