CMOS Presettable Up/Down Counters (Dual Clock With Reset)

Features: Individual clock lines for counting up or counting down Synchronous high-speed carry and borrow propagation delays for cascading Asynchronous reset and preset capability Medium-speed operation—fcy = 8 MHz (typ) @ 10 V 5.V, 10-V, and 15-V parametric ratings Standardized, symmetrica

CMOS 可预置 BCD 加/减计数器（具有重置功能的双时钟）

CD40192b Presettable BCD Up/Down Counter and the CD40193B Presettable Binary Up/Down Counter each consist of 4 synchronously clocked, gated \"D\" type flip-flops connected as a counter. The inputs consist of 4 individual jam lines, a PRESET\\ ENABLE\\ control, individual CLOCK UP and CLOCK DOWN sign • Individual clock lines for counting up or counting down\n• Asynchronous reset and preset capability\n• 5-V, 10-V, and 15-V parametric ratings\n• 100% tested for quiescent current at 20 V\n• Noise margin (full package-temperature range) =         1 V at VDD = 5 V         2 V at VDD = 10 V     ;

CMOs Presettable Up/Down counters

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4-bit up/down decade counter

DESCRIPTION The HEF40192B is a 4-bit synchronous up/down decade counter.

4-bit up/down decade counter

DESCRIPTION The HEF40192B is a 4-bit synchronous up/down decade counter.

4-bit up/down decade counter

DESCRIPTION The HEF40192B is a 4-bit synchronous up/down decade counter.

4-bit up/down decade counter

DESCRIPTION The HEF40192B is a 4-bit synchronous up/down decade counter.

4-bit up/down decade counter

DESCRIPTION The HEF40192B is a 4-bit synchronous up/down decade counter.