CMOS 18-Stage Static Shift Register

Features: = Fully st operation = Shifting rates up to 12 MHz @ 10 V (typ) Pormanont register storage with clock fine high or low — no information recirculation required = 100% tested for quiescent current at 20 V = Standardized, symmetrical output characteristics #5V, 10-V, and 16-V par

CMOS 18 级静态移位寄存器

CD4006B types are composed of 4 separate shift register sections: two sections of four stages and two sections of five stages with an output tap at the fourth stage. Each section has an independent single-rail data path. A common clock signal is used for all stages. Data are shifted to the next stag ·Fully static operation\n ·Shifting rates up to 12 MHz @ 10 V (typ.)\n ·Permanent register storage with clock line high or low - no information recirculation required\n ·100% tested for quiescent current at 20 V\n ·Standardized, symmetrical output characteristics\n ·5-V, 10-V, and 15-V parametri;

CMOS 18-Stage Static Shift Register

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18-stage static shift register

DESCRIPTION The HEF4006B is an 18-stage shift register arranged as two 4-stage and two 5-stage shift registers with a common clock input (CP). The two 4-stage shift registers each have a data input (DA, DB) and a data output (O3A, O3B); the two 5-stage shift registers each have a data input (DC,

18-stage static shift register

DESCRIPTION The HEF4006B is an 18-stage shift register arranged as two 4-stage and two 5-stage shift registers with a common clock input (CP). The two 4-stage shift registers each have a data input (DA, DB) and a data output (O3A, O3B); the two 5-stage shift registers each have a data input (DC,

18-stage static shift register

DESCRIPTION The HEF4006B is an 18-stage shift register arranged as two 4-stage and two 5-stage shift registers with a common clock input (CP). The two 4-stage shift registers each have a data input (DA, DB) and a data output (O3A, O3B); the two 5-stage shift registers each have a data input (DC,

18-stage static shift register

DESCRIPTION The HEF4006B is an 18-stage shift register arranged as two 4-stage and two 5-stage shift registers with a common clock input (CP). The two 4-stage shift registers each have a data input (DA, DB) and a data output (O3A, O3B); the two 5-stage shift registers each have a data input (DC,

GLASS PASSIVATED JUNCTION PLASTIC RECTIFIER(VOLTAGE - 50 to 1000 Volts CURRENT - 1.0 Ampere)

FEATURES ● Plastic package has Underwriters Laboratory Flammability Classification 94V-O utilizing Flame Retardant Epoxy Molding Compound ● Glass passivated junction version of PG4001S thru PG4007S in A-405 package ● 1 ampere operation at TA=75 ¢J with no thermal runaway ● Exceeds environmenta