RECEPTACLE ASSEMBLY, 4 PAIR, HMZd

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HEADER ASSEMBLY, 4 PAIR, 2.5mm TAIL, 25mm HMZd

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HEADER ASSEMBLY, 2 PAIR, 2.5mm TAIL, 25mm, HMZd

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THIS DRAWING IS A CONTROLLED DOCUMENT.

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HEADER ASSEMBLY, RIGHT ANGLE, 4 PAIR, HMZd

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HEADER ASSEMBLY, 4 PAIR, SELECTIVELY LOADED, 1.8mm TAIL, 25mm HMZd

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HEADER ASSEMBLY, 4 PAIR, 1.8mm TAIL, 25mm, HMZd

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HEADER ASSEMBLY, 2 PAIR, 1.8mm TAIL, 25mm, HMZd

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HEADER ASSEMBLY, 4 PAIR, SELECTIVELY LOADED, 2.5mm TAIL, 25mm, HMZd

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RECEPTACLE ASSEMBLY, 3 PAIR, 25mm, HMZd

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THIS DRAWING IS A CONTROLLED DOCUMENT.

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RECEPTACLE ASSEMBLY, 4 PAIR, 12.5mm HMZd

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RECEPTACLE ASSEMBLY, 4 PAIR, 30mm, HMZd

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HEADER ASSEMBLY, 4 PAIR, SELECTIVELY LOADED, 2.5mm TAIL, 25mm HMZd

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RECEPTACLE ASSEMBLY, 4 PAIR, 37.5mm HMZd

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HEADER ASSEMBLY, 4 PAIR, SELECTIVELY LOADED, 2.5mm TAIL, 25mm HMZd

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PNP SILICON POWER DARLINGTONS

PNP SILICON POWER DARLINGTONS ● Designed for Complementary Use with BD645, BD647, BD649 and BD651 ● 62.5 W at 25°C Case Temperature ● 8 A Continuous Collector Current ● Minimum hFE of 750 at 3 V , 3 A

HC648 OCTAL BUS TRANSCEIVER/REGISTER 3-STATE, INV. HC646 OCTAL BUS TRANSCEIVER/REGISTER 3-STATE

DESCRIPTION The M74HC646/648 are high speed CMOS OCTAL BUS TRANSCEIVERS AND REGISTERS, (3- STATE) fabricated in silicon gate C2MOS technology. They have the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■

Octal bus transceiver/register; 3-state

GENERAL DESCRIPTION The 74HC/HCT646 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Independent register for A and B buses • Multiplexed real-time and stored data • Output c

PHASE CONTROL THYRISTOR

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OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

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